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Searched refs:phy (Results 1 – 25 of 120) sorted by relevance

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/titanic_41/usr/src/uts/common/io/e1000api/
H A De1000_phy.c72 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_ops_generic() local
76 phy->ops.init_params = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
77 phy->ops.acquire = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
78 phy->ops.check_polarity = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
79 phy->ops.check_reset_block = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
80 phy->ops.commit = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
81 phy->ops.force_speed_duplex = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
82 phy->ops.get_cfg_done = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
83 phy->ops.get_cable_length = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
84 phy->ops.get_info = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
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H A De1000_82541.c87 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82541() local
92 phy->addr = 1; in e1000_init_phy_params_82541()
93 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82541()
94 phy->reset_delay_us = 10000; in e1000_init_phy_params_82541()
95 phy->type = e1000_phy_igp; in e1000_init_phy_params_82541()
98 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_82541()
99 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_82541()
100 phy->ops.get_cable_length = e1000_get_cable_length_igp_82541; in e1000_init_phy_params_82541()
101 phy->ops.get_cfg_done = e1000_get_cfg_done_generic; in e1000_init_phy_params_82541()
102 phy->ops.get_info = e1000_get_phy_info_igp; in e1000_init_phy_params_82541()
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H A De1000_82575.c166 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82575() local
172 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic; in e1000_init_phy_params_82575()
173 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic; in e1000_init_phy_params_82575()
175 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82575()
176 phy->type = e1000_phy_none; in e1000_init_phy_params_82575()
180 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82575()
181 phy->ops.power_down = e1000_power_down_phy_copper_82575; in e1000_init_phy_params_82575()
183 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82575()
184 phy->reset_delay_us = 100; in e1000_init_phy_params_82575()
186 phy->ops.acquire = e1000_acquire_phy_82575; in e1000_init_phy_params_82575()
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H A De1000_ich8lan.c198 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
203 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
212 if (hw->phy.id) { in e1000_phy_is_accessible_pchlan()
213 if (hw->phy.id == phy_id) in e1000_phy_is_accessible_pchlan()
216 hw->phy.id = phy_id; in e1000_phy_is_accessible_pchlan()
217 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
225 hw->phy.ops.release(hw); in e1000_phy_is_accessible_pchlan()
229 hw->phy.ops.acquire(hw); in e1000_phy_is_accessible_pchlan()
237 hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
239 hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
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H A De1000_82571.c96 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82571() local
101 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82571()
102 phy->type = e1000_phy_none; in e1000_init_phy_params_82571()
106 phy->addr = 1; in e1000_init_phy_params_82571()
107 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82571()
108 phy->reset_delay_us = 100; in e1000_init_phy_params_82571()
110 phy->ops.check_reset_block = e1000_check_reset_block_generic; in e1000_init_phy_params_82571()
111 phy->ops.reset = e1000_phy_hw_reset_generic; in e1000_init_phy_params_82571()
112 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82571; in e1000_init_phy_params_82571()
113 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic; in e1000_init_phy_params_82571()
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H A De1000_82540.c68 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82540() local
71 phy->addr = 1; in e1000_init_phy_params_82540()
72 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82540()
73 phy->reset_delay_us = 10000; in e1000_init_phy_params_82540()
74 phy->type = e1000_phy_m88; in e1000_init_phy_params_82540()
77 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82540()
78 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_82540()
79 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_82540()
80 phy->ops.get_cable_length = e1000_get_cable_length_m88; in e1000_init_phy_params_82540()
81 phy->ops.get_cfg_done = e1000_get_cfg_done_generic; in e1000_init_phy_params_82540()
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H A De1000_80003es2lan.c91 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_80003es2lan() local
96 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_80003es2lan()
97 phy->type = e1000_phy_none; in e1000_init_phy_params_80003es2lan()
100 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_80003es2lan()
101 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan; in e1000_init_phy_params_80003es2lan()
104 phy->addr = 1; in e1000_init_phy_params_80003es2lan()
105 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_80003es2lan()
106 phy->reset_delay_us = 100; in e1000_init_phy_params_80003es2lan()
107 phy->type = e1000_phy_gg82563; in e1000_init_phy_params_80003es2lan()
109 phy->ops.acquire = e1000_acquire_phy_80003es2lan; in e1000_init_phy_params_80003es2lan()
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H A De1000_82543.c86 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82543() local
91 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82543()
92 phy->type = e1000_phy_none; in e1000_init_phy_params_82543()
95 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82543()
96 phy->ops.power_down = e1000_power_down_phy_copper; in e1000_init_phy_params_82543()
99 phy->addr = 1; in e1000_init_phy_params_82543()
100 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82543()
101 phy->reset_delay_us = 10000; in e1000_init_phy_params_82543()
102 phy->type = e1000_phy_m88; in e1000_init_phy_params_82543()
105 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_82543()
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H A De1000_api.c100 if (hw->phy.ops.init_params) { in e1000_init_phy_params()
101 ret_val = hw->phy.ops.init_params(hw); in e1000_init_phy_params()
955 if (hw->phy.ops.check_reset_block) in e1000_check_reset_block()
956 return hw->phy.ops.check_reset_block(hw); in e1000_check_reset_block()
972 if (hw->phy.ops.read_reg) in e1000_read_phy_reg()
973 return hw->phy.ops.read_reg(hw, offset, data); in e1000_read_phy_reg()
989 if (hw->phy.ops.write_reg) in e1000_write_phy_reg()
990 return hw->phy.ops.write_reg(hw, offset, data); in e1000_write_phy_reg()
1004 if (hw->phy.ops.release) in e1000_release_phy()
1005 hw->phy.ops.release(hw); in e1000_release_phy()
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/titanic_41/usr/src/uts/intel/io/dnet/
H A Ddnet_mii.c61 static struct phydata *mii_get_valid_phydata(mii_handle_t mac, int phy);
71 static void postreset_ICS1890(mii_handle_t mac, int phy);
72 static void postreset_NS83840(mii_handle_t mac, int phy);
109 mii_probe_phy(mii_handle_t mac, int phy) in mii_probe_phy() argument
114 if (!mac || phy < 0 || phy > 31) in mii_probe_phy()
120 mac->mii_read(dip, phy, MII_STATUS); in mii_probe_phy()
121 status = mac->mii_read(dip, phy, MII_STATUS); in mii_probe_phy()
124 mac->mii_read(dip, phy, MII_CONTROL); in mii_probe_phy()
127 mac->mii_read(dip, phy, MII_CONTROL), status); in mii_probe_phy()
148 mii_init_phy(mii_handle_t mac, int phy) in mii_init_phy() argument
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H A Ddnet_mii.h59 typedef ushort_t (*mii_readfunc_t)(dev_info_t *, int phy, int reg);
60 typedef void (*mii_writefunc_t)(dev_info_t *, int phy, int reg, int value);
61 typedef void (*mii_linkfunc_t)(dev_info_t *, int phy, enum mii_phy_state state);
73 int mii_init_phy(mii_handle_t, int phy);
76 int mii_getspeed(mii_handle_t, int phy, int *speed, int *full_duplex);
79 int mii_probe_phy(mii_handle_t, int phy);
82 int mii_rsan(mii_handle_t mac, int phy, enum mii_wait_type wait_type);
85 int mii_fixspeed(mii_handle_t, int phy, int speed, int fullduplex);
88 int mii_autoneg_enab(mii_handle_t mac, int phy);
91 int mii_reset_phy(mii_handle_t, int phy, enum mii_wait_type wait_type);
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/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c38 typedef elink_status_t (*read_sfp_module_eeprom_func_p)(struct elink_phy *phy,
341 static int elink_sfp_module_detection(struct elink_phy *phy,
1661 params->phy[phy_index].mdio_ctrl); in elink_set_mdio_emac_per_phy()
1955 if (!(params->phy[ELINK_INT_PHY].flags & ELINK_FLAGS_TX_ERROR_CHECK)) { in elink_xmac_enable()
1986 (params->phy[ELINK_INT_PHY].supported & in elink_xmac_enable()
2863 struct elink_phy *phy, in elink_cl22_write() argument
2870 mode = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); in elink_cl22_write()
2871 REG_WR(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, in elink_cl22_write()
2875 tmp = ((phy->addr << 21) | (reg << 16) | val | in elink_cl22_write()
2878 REG_WR(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, tmp); in elink_cl22_write()
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/titanic_41/usr/src/uts/common/io/ixgbe/
H A Dixgbe_phy.c59 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_generic() local
64 phy->ops.identify = &ixgbe_identify_phy_generic; in ixgbe_init_phy_ops_generic()
65 phy->ops.reset = &ixgbe_reset_phy_generic; in ixgbe_init_phy_ops_generic()
66 phy->ops.read_reg = &ixgbe_read_phy_reg_generic; in ixgbe_init_phy_ops_generic()
67 phy->ops.write_reg = &ixgbe_write_phy_reg_generic; in ixgbe_init_phy_ops_generic()
68 phy->ops.setup_link = &ixgbe_setup_phy_link_generic; in ixgbe_init_phy_ops_generic()
69 phy->ops.setup_link_speed = &ixgbe_setup_phy_link_speed_generic; in ixgbe_init_phy_ops_generic()
70 phy->ops.check_link = NULL; in ixgbe_init_phy_ops_generic()
71 phy->ops.get_firmware_version = ixgbe_get_phy_firmware_version_generic; in ixgbe_init_phy_ops_generic()
72 phy->ops.read_i2c_byte = &ixgbe_read_i2c_byte_generic; in ixgbe_init_phy_ops_generic()
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H A Dixgbe_82599.c71 if (hw->phy.multispeed_fiber) { in ixgbe_init_mac_link_ops_82599()
76 (hw->phy.smart_speed == ixgbe_smart_speed_auto || in ixgbe_init_mac_link_ops_82599()
77 hw->phy.smart_speed == ixgbe_smart_speed_on) && in ixgbe_init_mac_link_ops_82599()
98 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82599() local
104 ret_val = phy->ops.identify(hw); in ixgbe_init_phy_ops_82599()
110 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) in ixgbe_init_phy_ops_82599()
111 hw->phy.ops.reset = NULL; in ixgbe_init_phy_ops_82599()
121 switch (hw->phy.type) { in ixgbe_init_phy_ops_82599()
123 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx; in ixgbe_init_phy_ops_82599()
124 phy->ops.check_link = &ixgbe_check_phy_link_tnx; in ixgbe_init_phy_ops_82599()
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H A Dixgbe_82598.c116 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_82598() local
125 phy->ops.init = &ixgbe_init_phy_ops_82598; in ixgbe_init_ops_82598()
157 phy->ops.read_i2c_eeprom = &ixgbe_read_i2c_eeprom_82598; in ixgbe_init_ops_82598()
184 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82598() local
191 phy->ops.identify(hw); in ixgbe_init_phy_ops_82598()
200 switch (hw->phy.type) { in ixgbe_init_phy_ops_82598()
202 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx; in ixgbe_init_phy_ops_82598()
203 phy->ops.check_link = &ixgbe_check_phy_link_tnx; in ixgbe_init_phy_ops_82598()
204 phy->ops.get_firmware_version = in ixgbe_init_phy_ops_82598()
208 phy->ops.reset = &ixgbe_reset_phy_nl; in ixgbe_init_phy_ops_82598()
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/titanic_41/usr/src/grub/grub-0.97/netboot/
H A Dtlan.c242 u32 phy[2]; member
416 u32 phy; in TLan_FinishReset() local
425 phy = priv->phy[priv->phyNum]; in TLan_FinishReset()
438 TLan_MiiReadReg(nic, phy, MII_GEN_ID_HI, &tlphy_id1); in TLan_FinishReset()
439 TLan_MiiReadReg(nic, phy, MII_GEN_ID_LO, &tlphy_id2); in TLan_FinishReset()
446 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status); in TLan_FinishReset()
448 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status); in TLan_FinishReset()
452 TLan_MiiReadReg(nic, phy, MII_AN_LPA, &partner); in TLan_FinishReset()
453 TLan_MiiReadReg(nic, phy, TLAN_TLPHY_PAR, in TLan_FinishReset()
494 TLan_MiiReadReg(nic, phy, TLAN_TLPHY_CTL, &tlphy_ctl); in TLan_FinishReset()
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/titanic_41/usr/src/lib/sun_sas/common/
H A DSun_sasGetPhyStatistics.c34 HBA_UINT32 port, HBA_UINT32 phy, SMHBA_PHYSTATISTICS *pStatistics) { in Sun_sasGetPhyStatistics() argument
54 "NULL Phy Statistics buffer of phyIndex: %08lx", phy); in Sun_sasGetPhyStatistics()
60 "NULL SAS Phy Statistics buffer of phyIndex: %08lx", phy); in Sun_sasGetPhyStatistics()
69 handle, phy); in Sun_sasGetPhyStatistics()
78 "Verify Adapter failed for phyIndex: %08lx", phy); in Sun_sasGetPhyStatistics()
93 "Invalid port index of phyIndex: %08lx", phy); in Sun_sasGetPhyStatistics()
98 if (phy >= hba_port_ptr->port_attributes.PortSpecificAttribute. in Sun_sasGetPhyStatistics()
100 log(LOG_DEBUG, ROUTINE, "Invalid phy index %08lx", phy); in Sun_sasGetPhyStatistics()
109 if (phy == phy_ptr->index) in Sun_sasGetPhyStatistics()
114 log(LOG_DEBUG, ROUTINE, "Invalid phy index %08lx", phy); in Sun_sasGetPhyStatistics()
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H A DSun_sasGetSASPhyAttributes.c33 HBA_UINT32 port, HBA_UINT32 phy, SMHBA_SAS_PHY *pAttributes) in Sun_sasGetSASPhyAttributes() argument
77 if (phy >= hba_port_ptr->port_attributes.PortSpecificAttribute. in Sun_sasGetSASPhyAttributes()
79 log(LOG_DEBUG, ROUTINE, "Invalid phy index %d", phy); in Sun_sasGetSASPhyAttributes()
85 if (phy == phy_ptr->index) { in Sun_sasGetSASPhyAttributes()
88 (void) memcpy(pAttributes, &phy_ptr->phy, in Sun_sasGetSASPhyAttributes()
97 log(LOG_DEBUG, ROUTINE, "Illegal phy index %d", phy); in Sun_sasGetSASPhyAttributes()
H A Ddevtree_phy_disco.c172 phy_ptr->phy.PhyIdentifier = phyId; in get_phy_info()
173 phy_ptr->phy.NegotiatedLinkRate = negoRate; in get_phy_info()
174 phy_ptr->phy.ProgrammedMinLinkRate = prgmMinRate; in get_phy_info()
175 phy_ptr->phy.ProgrammedMaxLinkRate = prgmMaxRate; in get_phy_info()
176 phy_ptr->phy.HardwareMinLinkRate = hwMinRate; in get_phy_info()
177 phy_ptr->phy.HardwareMaxLinkRate = hwMaxRate; in get_phy_info()
181 (void) memset(phy_ptr->phy.domainPortWWN.wwn, 0, 8); in get_phy_info()
/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dch_subr.c163 struct cphy *phy = adapter->port[port_id].phy; in link_changed() local
166 phy->ops->get_link_status(phy, &link_ok, &speed, &duplex, &fc); in link_changed()
211 struct cphy *phy = adapter->port[p].phy; in fpga_phy_intr_handler() local
212 int phy_cause = phy->ops->interrupt_handler(phy); in fpga_phy_intr_handler()
822 t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc) in t1_link_start() argument
837 phy->ops->advertise(phy, lc->advertising); in t1_link_start()
846 phy->state = PHY_AUTONEG_RDY; in t1_link_start()
847 phy->ops->set_speed_duplex(phy, lc->speed, lc->duplex); in t1_link_start()
848 phy->ops->reset(phy, 0); in t1_link_start()
850 phy->state = PHY_AUTONEG_EN; in t1_link_start()
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H A Dcphy.h69 int (*advertise)(struct cphy *phy, unsigned int advertise_map);
71 int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
72 int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
125 static inline void cphy_init(struct cphy *phy, adapter_t *adapter, in cphy_init() argument
129 phy->adapter = adapter; in cphy_init()
130 phy->addr = phy_addr; in cphy_init()
131 phy->ops = phy_ops; in cphy_init()
133 phy->mdio_read = mdio_ops->read; in cphy_init()
134 phy->mdio_write = mdio_ops->write; in cphy_init()
/titanic_41/usr/src/uts/common/io/ntxn/
H A Dniu.c102 long phy = adapter->physical_port; in unm_niu_gbe_phy_read() local
135 address.phy_addr = (unm_crbword_t)phy; in unm_niu_gbe_phy_read()
180 int phy = adapter->physical_port; in unm_niu_macaddr_get() local
184 if ((phy < 0) || (phy > 3)) in unm_niu_macaddr_get()
193 UNM_NIU_GB_STATION_ADDR_1(phy))) >> 16; in unm_niu_macaddr_get()
195 adapter, UNM_NIU_GB_STATION_ADDR_0(phy)))) << 16; in unm_niu_macaddr_get()
214 int phy = adapter->physical_port; in unm_niu_macaddr_set() local
216 if ((phy < 0) || (phy > 3)) in unm_niu_macaddr_set()
221 adapter->unm_nic_hw_write_wx(adapter, UNM_NIU_GB_STATION_ADDR_1(phy), in unm_niu_macaddr_set()
225 adapter->unm_nic_hw_write_wx(adapter, UNM_NIU_GB_STATION_ADDR_0(phy), in unm_niu_macaddr_set()
[all …]
/titanic_41/usr/src/cmd/mdb/common/modules/pmcs/
H A Dpmcs.c73 print_sas_address(pmcs_phy_t *phy) in print_sas_address() argument
78 mdb_printf("%02x", phy->sas_address[idx]); in print_sas_address()
176 struct pmcs_phy phy; in pmcs_iport_phy_walk_cb() local
178 if (mdb_vread(&phy, sizeof (struct pmcs_phy), addr) != in pmcs_iport_phy_walk_cb()
183 mdb_printf("%16p %2d\n", addr, phy.phynum); in pmcs_iport_phy_walk_cb()
477 pmcs_phy_t phy; in pmcs_utarget_walk_cb() local
479 if (mdb_vread(&phy, sizeof (pmcs_phy_t), (uintptr_t)addr) == -1) { in pmcs_utarget_walk_cb()
485 if (phy.configured && (phy.target == NULL)) { in pmcs_utarget_walk_cb()
487 print_sas_address(&phy); in pmcs_utarget_walk_cb()
489 switch (phy.dtype) { in pmcs_utarget_walk_cb()
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/titanic_41/usr/src/lib/fm/topo/modules/sun4v/sun4vpi/
H A Dpi_bay.c207 di_minor_t *minorp, int phy) in pi_bay_find_nodes() argument
222 if (phy == pi_get_phynum(mod, sib)) { in pi_bay_find_nodes()
237 if (phy == pi_get_phynum(mod, gsib)) { in pi_bay_find_nodes()
275 pi_bay_update_node(topo_mod_t *mod, tnode_t *t_node, uint8_t phy, in pi_bay_update_node() argument
335 pi_bay_find_nodes(mod, &dnode, &sib, &minor, phy); in pi_bay_update_node()
338 "PHY %d.\n", phy); in pi_bay_update_node()
363 uint8_t *phy = NULL; in pi_enum_bay() local
368 nphy = pi_get_priphy(mod, mdp, mde_node, phy); in pi_enum_bay()
375 phy = topo_mod_alloc(mod, (nphy * sizeof (uint8_t))); in pi_enum_bay()
376 if (phy == NULL) { in pi_enum_bay()
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/titanic_41/usr/src/uts/common/io/atge/
H A Datge_mii.c64 atge_mii_read(void *arg, uint8_t phy, uint8_t reg) in atge_mii_read() argument
86 phy, reg); in atge_mii_read()
107 atge_mii_write(void *arg, uint8_t phy, uint8_t reg, uint16_t val) in atge_mii_write() argument
130 " val :%d", phy, reg, val); in atge_mii_write()
350 atge_l1c_mii_read(void *arg, uint8_t phy, uint8_t reg) in atge_l1c_mii_read() argument
353 if (phy != 0) { in atge_l1c_mii_read()
358 return (atge_mii_read(arg, phy, reg)); in atge_l1c_mii_read()
362 atge_l1c_mii_write(void *arg, uint8_t phy, uint8_t reg, uint16_t val) in atge_l1c_mii_write() argument
365 if (phy != 0) { in atge_l1c_mii_write()
378 atge_mii_write(arg, phy, reg, val | MII_CONTROL_RESET); in atge_l1c_mii_write()
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