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Searched refs:pci_config_get8 (Results 1 – 25 of 108) sorted by relevance

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/titanic_41/usr/src/uts/common/io/igb/
H A Digb_debug.c73 pci_config_get8(handle, PCI_CONF_REVID)); in pci_dump()
76 pci_config_get8(handle, PCI_CONF_PROGCLASS)); in pci_dump()
79 pci_config_get8(handle, PCI_CONF_SUBCLASS)); in pci_dump()
82 pci_config_get8(handle, PCI_CONF_BASCLASS)); in pci_dump()
85 pci_config_get8(handle, PCI_CONF_CACHE_LINESZ)); in pci_dump()
88 pci_config_get8(handle, PCI_CONF_LATENCY_TIMER)); in pci_dump()
91 pci_config_get8(handle, PCI_CONF_HEADER)); in pci_dump()
94 pci_config_get8(handle, PCI_CONF_BIST)); in pci_dump()
129 cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR); in pci_dump()
135 pci_config_get8(handle, PCI_CONF_ILINE)); in pci_dump()
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/titanic_41/usr/src/uts/common/io/ixgbe/
H A Dixgbe_debug.c200 pci_config_get8(handle, PCI_CONF_REVID)); in ixgbe_pci_dump()
203 pci_config_get8(handle, PCI_CONF_PROGCLASS)); in ixgbe_pci_dump()
206 pci_config_get8(handle, PCI_CONF_SUBCLASS)); in ixgbe_pci_dump()
209 pci_config_get8(handle, PCI_CONF_BASCLASS)); in ixgbe_pci_dump()
212 pci_config_get8(handle, PCI_CONF_CACHE_LINESZ)); in ixgbe_pci_dump()
215 pci_config_get8(handle, PCI_CONF_LATENCY_TIMER)); in ixgbe_pci_dump()
218 pci_config_get8(handle, PCI_CONF_HEADER)); in ixgbe_pci_dump()
221 pci_config_get8(handle, PCI_CONF_BIST)); in ixgbe_pci_dump()
256 cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR); in ixgbe_pci_dump()
262 pci_config_get8(handle, PCI_CONF_ILINE)); in ixgbe_pci_dump()
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/titanic_41/usr/src/uts/common/io/
H A Dpci_cap.c67 for (i = 0, base = pci_config_get8(h, PCI_CONF_CAP_PTR); in pci_cap_probe()
68 base && i < index; base = pci_config_get8(h, base in pci_cap_probe()
71 if ((id = pci_config_get8(h, base)) == 0xff) in pci_cap_probe()
86 if ((id = pci_config_get8(h, base)) != 0xff) in pci_cap_probe()
135 header = pci_config_get8(h, PCI_CONF_HEADER); in pci_lcap_locate()
152 for (base = pci_config_get8(h, base); base; in pci_lcap_locate()
153 base = pci_config_get8(h, base + PCI_CAP_NEXT_PTR)) { in pci_lcap_locate()
154 if (pci_config_get8(h, base) == id) { in pci_lcap_locate()
217 header = pci_config_get8(h, PCI_CONF_HEADER); in pci_htcap_locate()
231 for (base = pci_config_get8(h, base); base; in pci_htcap_locate()
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/titanic_41/usr/src/uts/common/io/e1000g/
H A De1000g_debug.c395 pci_config_get8(handle, PCI_CONF_REVID)); in pciconfig_dump()
398 pci_config_get8(handle, PCI_CONF_PROGCLASS)); in pciconfig_dump()
401 pci_config_get8(handle, PCI_CONF_SUBCLASS)); in pciconfig_dump()
404 pci_config_get8(handle, PCI_CONF_BASCLASS)); in pciconfig_dump()
407 pci_config_get8(handle, PCI_CONF_CACHE_LINESZ)); in pciconfig_dump()
410 pci_config_get8(handle, PCI_CONF_LATENCY_TIMER)); in pciconfig_dump()
413 pci_config_get8(handle, PCI_CONF_HEADER)); in pciconfig_dump()
416 pci_config_get8(handle, PCI_CONF_BIST)); in pciconfig_dump()
438 cap_ptr = pci_config_get8(handle, PCI_CONF_CAP_PTR); in pciconfig_dump()
444 pci_config_get8(handle, PCI_CONF_ILINE)); in pciconfig_dump()
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/titanic_41/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c301 if (pci_config_get8(handle, PCI_CONF_IPIN)) { in cardbus_validate_iline()
302 intline = pci_config_get8(handle, PCI_CONF_ILINE); in cardbus_validate_iline()
627 header_type = pci_config_get8(handle, PCI_CONF_HEADER); in cardbus_program_ap()
628 sec_bus = pci_config_get8(handle, PCI_BCNF_SECBUS); in cardbus_program_ap()
695 header_type = pci_config_get8(handle, in cardbus_topbridge_assign()
734 bus_range[0] = pci_config_get8(handle, PCI_BCNF_SECBUS); in cardbus_bridge_ranges()
735 bus_range[1] = pci_config_get8(handle, PCI_BCNF_SUBBUS); in cardbus_bridge_ranges()
821 header_type = pci_config_get8(handle, PCI_CONF_HEADER) & in cardbus_bridge_assign()
823 base_class = pci_config_get8(handle, PCI_CONF_BASCLASS); in cardbus_bridge_assign()
832 sub_class = pci_config_get8(handle, PCI_CONF_SUBCLASS); in cardbus_bridge_assign()
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H A Dcardbus_hp.c1641 card_info.prog_class = pci_config_get8(handle, in cardbus_ioctl()
1643 card_info.base_class = pci_config_get8(handle, in cardbus_ioctl()
1645 card_info.sub_class = pci_config_get8(handle, in cardbus_ioctl()
1647 card_info.header_type = pci_config_get8(handle, in cardbus_ioctl()
1694 { "Latency =", 0xd, (int(*)())pci_config_get8, "%s 0x%02x" },
1701 { "ILINE =", 0x3c, (int(*)())pci_config_get8, "%s 0x%02x" },
1702 { "IPIN =", 0x3d, (int(*)())pci_config_get8, "%s 0x%02x" },
1711 { "CacheLineSz =", 0xc, (int(*)())pci_config_get8, "%s 0x%02x" },
1712 { "Latency =", 0xd, (int(*)())pci_config_get8, "%s 0x%02x" },
1714 { "Pri Bus =", 0x18, (int(*)())pci_config_get8, "%s 0x%02x" },
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/titanic_41/usr/src/uts/sun4u/io/pci/
H A Dsimba.c425 pci_config_get8(simba->config_handle, in simba_attach()
428 pci_config_get8(simba->config_handle, in simba_attach()
781 header_type = pci_config_get8(config_handle, PCI_CONF_HEADER); in simba_initchild()
821 n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); in simba_initchild()
839 min_gnt = pci_config_get8(config_handle, in simba_initchild()
845 n = pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); in simba_initchild()
936 statep->header_type = pci_config_get8(ch, PCI_CONF_HEADER); in simba_save_config_regs()
941 pci_config_get8(ch, PCI_CONF_CACHE_LINESZ); in simba_save_config_regs()
943 pci_config_get8(ch, PCI_CONF_LATENCY_TIMER); in simba_save_config_regs()
946 pci_config_get8(ch, PCI_BCNF_LATENCY_TIMER); in simba_save_config_regs()
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H A Ddb21554.c1620 ph->revid = pci_config_get8(config_handle, hdr_off + PCI_CONF_REVID); in db_pci_get_header()
1621 ph->pif = pci_config_get8(config_handle, hdr_off + PCI_CONF_PROGCLASS); in db_pci_get_header()
1622 ph->subclass = pci_config_get8(config_handle, in db_pci_get_header()
1624 ph->class = pci_config_get8(config_handle, in db_pci_get_header()
1626 ph->cacheline = pci_config_get8(config_handle, in db_pci_get_header()
1628 ph->lat = pci_config_get8(config_handle, in db_pci_get_header()
1630 ph->hdr_type = pci_config_get8(config_handle, in db_pci_get_header()
1632 ph->bist = pci_config_get8(config_handle, hdr_off + PCI_CONF_BIST); in db_pci_get_header()
1647 ph->int_line = pci_config_get8(config_handle, hdr_off + PCI_CONF_ILINE); in db_pci_get_header()
1648 ph->int_pin = pci_config_get8(config_handle, hdr_off + PCI_CONF_IPIN); in db_pci_get_header()
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H A Dpci_util.c539 header_type = pci_config_get8(config_handle, PCI_CONF_HEADER); in init_child()
571 bcr = pci_config_get8(config_handle, PCI_BCNF_BCNTRL); in init_child()
589 n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); in init_child()
607 min_gnt = pci_config_get8(config_handle, in init_child()
625 n = pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); in init_child()
H A Dpcix.c54 if ((pci_config_get8(handle, PCI_CONF_HEADER) & PCI_HEADER_TYPE_M) in pcix_set_cmd_reg()
H A Dpci_pci.c418 pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); in ppb_attach()
420 pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); in ppb_attach()
895 header_type = pci_config_get8(config_handle, PCI_CONF_HEADER); in ppb_initchild()
912 bcr = pci_config_get8(config_handle, PCI_BCNF_BCNTRL); in ppb_initchild()
929 n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); in ppb_initchild()
948 min_gnt = pci_config_get8(config_handle, in ppb_initchild()
954 n = pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); in ppb_initchild()
1486 io_base_lo = pci_config_get8(config_handle, PCI_BCNF_IO_BASE_LOW); in ppb_create_ranges_prop()
1487 io_limit_lo = pci_config_get8(config_handle, PCI_BCNF_IO_LIMIT_LOW); in ppb_create_ranges_prop()
/titanic_41/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c405 pci_config_get8(config_handle, PCI_CONF_REVID)); in pcicfg_dump_common_config()
407 pci_config_get8(config_handle, PCI_CONF_PROGCLASS)); in pcicfg_dump_common_config()
409 pci_config_get8(config_handle, PCI_CONF_SUBCLASS)); in pcicfg_dump_common_config()
411 pci_config_get8(config_handle, PCI_CONF_BASCLASS)); in pcicfg_dump_common_config()
413 pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ)); in pcicfg_dump_common_config()
415 pci_config_get8(config_handle, PCI_CONF_HEADER)); in pcicfg_dump_common_config()
417 pci_config_get8(config_handle, PCI_CONF_BIST)); in pcicfg_dump_common_config()
449 pci_config_get8(config_handle, PCI_CONF_ILINE)); in pcicfg_dump_device_config()
451 pci_config_get8(config_handle, PCI_CONF_IPIN)); in pcicfg_dump_device_config()
453 pci_config_get8(config_handle, PCI_CONF_MIN_G)); in pcicfg_dump_device_config()
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/titanic_41/usr/src/uts/intel/io/amr/
H A Damrreg.h603 #define AMR_QGET_ISTAT(sc) pci_config_get8(sc->regsmap_handle, AMR_QINTR)
685 #define AMR_SGET_ISTAT(sc) pci_config_get8(sc->regsmap_handle, AMR_SINTR)
690 #define AMR_SGET_MBSTAT(sc) pci_config_get8(sc->regsmap_handle, \
695 pci_config_get8(sc->regsmap_handle, AMR_STOGGLE) \
700 pci_config_get8(sc->regsmap_handle, AMR_STOGGLE) \
/titanic_41/usr/src/uts/common/os/
H A Dsunpci.c61 pci_config_get8(ddi_acc_handle_t handle, off_t offset) in pci_config_get8() function
427 cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR);
432 cap_id = pci_config_get8(confhdl,
438 cap_ptr = pci_config_get8(confhdl,
503 chsp->chs_header_type = pci_config_get8(confhdl,
509 chsp->chs_cache_line_size = pci_config_get8(confhdl,
511 chsp->chs_latency_timer = pci_config_get8(confhdl,
516 pci_config_get8(confhdl, PCI_BCNF_LATENCY_TIMER);
599 cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR);
936 header_type = pci_config_get8(conf_hdl, PCI_CONF_HEADER);
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/titanic_41/usr/src/uts/sun4/io/
H A Dpcicfg.c434 pci_config_get8(config_handle, PCI_CONF_REVID)); in pcicfg_dump_common_config()
436 pci_config_get8(config_handle, PCI_CONF_PROGCLASS)); in pcicfg_dump_common_config()
438 pci_config_get8(config_handle, PCI_CONF_SUBCLASS)); in pcicfg_dump_common_config()
440 pci_config_get8(config_handle, PCI_CONF_BASCLASS)); in pcicfg_dump_common_config()
442 pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ)); in pcicfg_dump_common_config()
444 pci_config_get8(config_handle, PCI_CONF_HEADER)); in pcicfg_dump_common_config()
446 pci_config_get8(config_handle, PCI_CONF_BIST)); in pcicfg_dump_common_config()
478 pci_config_get8(config_handle, PCI_CONF_ILINE)); in pcicfg_dump_device_config()
480 pci_config_get8(config_handle, PCI_CONF_IPIN)); in pcicfg_dump_device_config()
482 pci_config_get8(config_handle, PCI_CONF_MIN_G)); in pcicfg_dump_device_config()
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/titanic_41/usr/src/uts/i86pc/io/pciex/
H A Dnpe_misc.c123 (pci_config_get8(cfg_hdl, PCI_CONF_REVID) >= in npe_ck804_fix_aer_ptr()
343 cl = pci_config_get8(cfg_hdl, PCI_CONF_BASCLASS); in npe_save_htconfig_children()
344 scl = pci_config_get8(cfg_hdl, PCI_CONF_SUBCLASS); in npe_save_htconfig_children()
/titanic_41/usr/src/uts/common/sys/
H A Dpci_impl.h193 ((xspace) ? 0 : pci_config_get8((confhdl), (cap_ptr) + PCI_CAP_ID))
197 pci_config_get8((confhdl), (cap_ptr) + PCI_CAP_NEXT_PTR))
/titanic_41/usr/src/uts/sun4v/ontario/os/
H A Dontario.c117 val = pci_config_get8(isa_handle, 0x58); in plat_ide_chipreset()
/titanic_41/usr/src/uts/intel/io/agpgart/
H A Dagptarget.c139 nextcap = (off_t)(pci_config_get8(pci_handle, AGP_CONF_CAPPTR)); in agp_target_cap_find()
222 value = (uint16_t)pci_config_get8(softstate->tsoft_pcihdl, in agp_target_get_apsize()
432 memval = pci_config_get8(softstate->tsoft_pcihdl, in i8xx_biosmem_detect()
781 value = pci_config_get8(st->tsoft_pcihdl, in agp_target_ioctl()
801 value2 = pci_config_get8(st->tsoft_pcihdl, in agp_target_ioctl()
/titanic_41/usr/src/uts/sun4u/grover/os/
H A Dgrover.c112 val = pci_config_get8(grover_isa_handle, 0x58); in plat_ide_chipreset()
/titanic_41/usr/src/uts/sun4u/fjlite/os/
H A Dfjlite.c119 val = pci_config_get8(platform_isa_handle, 0x58); in plat_ide_chipreset()
/titanic_41/usr/src/uts/intel/io/dktp/controller/ata/
H A Dsil3xxx.c94 cache_lnsz = pci_config_get8(pci_conf_handle, PCI_CONF_CACHE_LINESZ); in sil3xxx_init_controller()
/titanic_41/usr/src/uts/sun4u/snowbird/os/
H A Dsnowbird.c145 val = pci_config_get8(platform_isa_handle, 0x58); in plat_ide_chipreset()
/titanic_41/usr/src/uts/sun4u/taco/os/
H A Dtaco.c133 val = pci_config_get8(isa_handle, IDEIC_RINDEX); in plat_ide_chipreset()
/titanic_41/usr/src/man/man9f/
H A DMakefile386 pci_config_get8.9f \
1861 pci_config_get16.9f := LINKSRC = pci_config_get8.9f
1862 pci_config_get32.9f := LINKSRC = pci_config_get8.9f
1863 pci_config_get64.9f := LINKSRC = pci_config_get8.9f
1864 pci_config_getb.9f := LINKSRC = pci_config_get8.9f
1865 pci_config_getl.9f := LINKSRC = pci_config_get8.9f
1866 pci_config_getll.9f := LINKSRC = pci_config_get8.9f
1867 pci_config_getw.9f := LINKSRC = pci_config_get8.9f
1868 pci_config_put16.9f := LINKSRC = pci_config_get8.9f
1869 pci_config_put32.9f := LINKSRC = pci_config_get8.9f
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