Home
last modified time | relevance | path

Searched refs:param_arr (Results 1 – 16 of 16) sorted by relevance

/titanic_41/usr/src/uts/sun/io/eri/
H A Deri_common.h298 #define param_transceiver (erip->param_arr[0].param_val)
299 #define param_linkup (erip->param_arr[1].param_val)
300 #define param_speed (erip->param_arr[2].param_val)
301 #define param_mode (erip->param_arr[3].param_val)
302 #define param_ipg1 (erip->param_arr[4].param_val)
303 #define param_ipg2 (erip->param_arr[5].param_val)
304 #define param_use_intphy (erip->param_arr[6].param_val)
305 #define param_pace_count (erip->param_arr[7].param_val)
306 #define param_autoneg (erip->param_arr[8].param_val)
307 #define param_anar_100T4 (erip->param_arr[9].param_val)
[all …]
H A Deri.h529 param_t param_arr[ERI_PARAM_CNT]; member
H A Deri.c551 static param_t param_arr[] = { variable
3840 for (i = 0; i < A_CNT(param_arr); i++) in eri_init_xfer_params()
3841 erip->param_arr[i] = param_arr[i]; in eri_init_xfer_params()
3851 erip->param_arr, A_CNT(param_arr))) { in eri_init_xfer_params()
/titanic_41/usr/src/uts/common/io/hxge/
H A Dhxge_ndd.c230 p_hxge_param_t param_arr; in hxge_get_param_soft_properties() local
238 param_arr = hxgep->param_arr; in hxge_get_param_soft_properties()
242 if ((param_arr[i].type & HXGE_PARAM_READ_PROP) == 0) in hxge_get_param_soft_properties()
245 if ((param_arr[i].type & HXGE_PARAM_PROP_STR)) in hxge_get_param_soft_properties()
248 if ((param_arr[i].type & HXGE_PARAM_PROP_ARR32) || in hxge_get_param_soft_properties()
249 (param_arr[i].type & HXGE_PARAM_PROP_ARR64)) { in hxge_get_param_soft_properties()
252 hxgep->dip, 0, param_arr[i].fcode_name, in hxge_get_param_soft_properties()
262 (uint64_t *)(int32_t)param_arr[i].value; in hxge_get_param_soft_properties()
264 cfg_value = (uint64_t *)param_arr[i].value; in hxge_get_param_soft_properties()
270 param_arr[i].type |= in hxge_get_param_soft_properties()
[all …]
H A Dhxge_virtual.c93 p_hxge_param_t param_arr; in hxge_set_hw_vlan_class_config() local
106 param_arr = hxgep->param_arr; in hxge_set_hw_vlan_class_config()
107 prop = param_arr[param_vlan_ids].fcode_name; in hxge_set_hw_vlan_class_config()
157 p_hxge_param_t param_arr; in hxge_use_cfg_vlan_class_config() local
165 param_arr = hxgep->param_arr; in hxge_use_cfg_vlan_class_config()
166 prop = param_arr[param_vlan_ids].fcode_name; in hxge_use_cfg_vlan_class_config()
176 pa = &param_arr[param_implicit_vlan_id]; in hxge_use_cfg_vlan_class_config()
230 p_hxge_param_t param_arr; in hxge_use_cfg_dma_config() local
236 param_arr = hxgep->param_arr; in hxge_use_cfg_dma_config()
268 prop = param_arr[param_accept_jumbo].fcode_name; in hxge_use_cfg_dma_config()
[all …]
H A Dhxge_main.c3392 p_hxge_param_t param_arr = hxgep->param_arr; in hxge_set_priv_prop() local
3405 (char *)pr_val, (caddr_t)&param_arr[param_rxdma_intr_time]); in hxge_set_priv_prop()
3408 (char *)pr_val, (caddr_t)&param_arr[param_rxdma_intr_pkts]); in hxge_set_priv_prop()
3413 (caddr_t)&param_arr[param_class_opt_ipv4_tcp]); in hxge_set_priv_prop()
3416 (caddr_t)&param_arr[param_class_opt_ipv4_udp]); in hxge_set_priv_prop()
3419 (caddr_t)&param_arr[param_class_opt_ipv4_ah]); in hxge_set_priv_prop()
3422 (caddr_t)&param_arr[param_class_opt_ipv4_sctp]); in hxge_set_priv_prop()
3425 (caddr_t)&param_arr[param_class_opt_ipv6_tcp]); in hxge_set_priv_prop()
3428 (caddr_t)&param_arr[param_class_opt_ipv6_udp]); in hxge_set_priv_prop()
3431 (caddr_t)&param_arr[param_class_opt_ipv6_ah]); in hxge_set_priv_prop()
[all …]
H A Dhxge.h310 p_hxge_param_t param_arr; member
H A Dhxge_hw.c67 if (hxgep->param_arr[param_accept_jumbo].value) in hxge_hw_id_init()
H A Dhxge_pfc.c898 pa = (p_hxge_param_t)&hxgep->param_arr[param_implicit_vlan_id]; in hxge_pfc_update_hw()
/titanic_41/usr/src/uts/common/io/nxge/
H A Dnxge_ndd.c547 p_nxge_param_t param_arr; in nxge_get_param_soft_properties() local
555 param_arr = nxgep->param_arr; in nxge_get_param_soft_properties()
558 if ((param_arr[i].type & NXGE_PARAM_READ_PROP) == 0) in nxge_get_param_soft_properties()
560 if ((param_arr[i].type & NXGE_PARAM_PROP_STR)) in nxge_get_param_soft_properties()
562 if ((param_arr[i].type & NXGE_PARAM_PROP_ARR32) || in nxge_get_param_soft_properties()
563 (param_arr[i].type & NXGE_PARAM_PROP_ARR64)) { in nxge_get_param_soft_properties()
565 nxgep->dip, 0, param_arr[i].fcode_name, in nxge_get_param_soft_properties()
576 (uint32_t *)(int32_t)param_arr[i].value; in nxge_get_param_soft_properties()
578 cfg_value = (uint32_t *)param_arr[i].value; in nxge_get_param_soft_properties()
584 param_arr[i].type |= in nxge_get_param_soft_properties()
[all …]
H A Dnxge_virtual.c405 p_nxge_param_t param_arr; in nxge_update_rxdma_grp_properties() local
413 param_arr = nxgep->param_arr; in nxge_update_rxdma_grp_properties()
414 start_prop = param_arr[param_rdc_grps_start].fcode_name; in nxge_update_rxdma_grp_properties()
415 num_prop = param_arr[param_rx_rdc_grps].fcode_name; in nxge_update_rxdma_grp_properties()
579 p_nxge_param_t param_arr; in nxge_update_rxdma_properties() local
589 param_arr = nxgep->param_arr; in nxge_update_rxdma_properties()
590 start_rdc_prop = param_arr[param_rxdma_channels_begin].fcode_name; in nxge_update_rxdma_properties()
591 num_rdc_prop = param_arr[param_rxdma_channels].fcode_name; in nxge_update_rxdma_properties()
794 p_nxge_param_t param_arr; in nxge_update_txdma_properties() local
804 param_arr = nxgep->param_arr; in nxge_update_txdma_properties()
[all …]
H A Dnxge_hw.c1045 nxgep->param_arr[param_autoneg].value = 0; in nxge_set_lb()
1046 nxgep->param_arr[param_anar_10gfdx].value = in nxge_set_lb()
1051 nxgep->param_arr[param_anar_10ghdx].value = 0; in nxge_set_lb()
1052 nxgep->param_arr[param_anar_1000fdx].value = in nxge_set_lb()
1057 nxgep->param_arr[param_anar_1000hdx].value = 0; in nxge_set_lb()
1058 nxgep->param_arr[param_anar_100fdx].value = in nxge_set_lb()
1062 nxgep->param_arr[param_anar_100hdx].value = 0; in nxge_set_lb()
1063 nxgep->param_arr[param_anar_10fdx].value = in nxge_set_lb()
1067 nxgep->param_arr[param_master_cfg_enable].value = 1; in nxge_set_lb()
1068 nxgep->param_arr[param_master_cfg_value].value = 1; in nxge_set_lb()
[all …]
H A Dnxge_mac.c3776 p_nxge_param_t param_arr = nxgep->param_arr; in nxge_10G_xcvr_init() local
3833 param_arr[param_anar_asmpause].value; in nxge_10G_xcvr_init()
3834 statsp->mac_stats.adv_cap_pause = param_arr[param_anar_pause].value; in nxge_10G_xcvr_init()
3852 p_nxge_param_t param_arr = nxgep->param_arr; in nxge_1G_xcvr_init() local
3858 param_arr[param_anar_1000fdx].value; in nxge_1G_xcvr_init()
3866 statsp->mac_stats.cap_1000fdx = param_arr[param_anar_1000fdx].value; in nxge_1G_xcvr_init()
3870 param_arr[param_anar_100fdx].value; in nxge_1G_xcvr_init()
3872 param_arr[param_anar_10fdx].value; in nxge_1G_xcvr_init()
3907 p_nxge_param_t param_arr; in nxge_tn1010_xcvr_init() local
3917 param_arr = nxgep->param_arr; in nxge_tn1010_xcvr_init()
[all …]
H A Dnxge_main.c4558 p_nxge_param_t param_arr = nxgep->param_arr; in nxge_m_setprop() local
4580 param_arr[param_anar_1000fdx].value = *(uint8_t *)pr_val; in nxge_m_setprop()
4585 param_arr[param_anar_100fdx].value = *(uint8_t *)pr_val; in nxge_m_setprop()
4590 param_arr[param_anar_10fdx].value = *(uint8_t *)pr_val; in nxge_m_setprop()
4594 param_arr[param_autoneg].value = *(uint8_t *)pr_val; in nxge_m_setprop()
4651 param_arr[param_anar_pause].value = 0; in nxge_m_setprop()
4655 param_arr[param_anar_pause].value = 1; in nxge_m_setprop()
4700 p_nxge_param_t param_arr = nxgep->param_arr; in nxge_m_getprop() local
4729 *(uint8_t *)pr_val = param_arr[param_autoneg].value; in nxge_m_getprop()
4733 link_flowctrl_t fl = param_arr[param_anar_pause].value != 0 ? in nxge_m_getprop()
[all …]
H A Dnxge_fflp.c208 access_ratio = nxgep->param_arr[param_tcam_access_ratio].value; in nxge_fflp_tcam_init()
384 access_ratio = nxgep->param_arr[param_fcram_access_ratio].value; in nxge_fflp_fcram_init()
2033 pa = (p_nxge_param_t)&nxgep->param_arr[param_vlan_2rdc_grp]; in nxge_fflp_update_hw()
2057 pa = (p_nxge_param_t)&nxgep->param_arr[param_mac_2rdc_grp]; in nxge_fflp_update_hw()
/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge.h663 p_nxge_param_t param_arr; member