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Searched refs:mtr (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/intel_nb5000/
H A Dnb5000.h70 #define MTR_PRESENT(mtr) \ argument
71 (((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100) \
73 #define MTR_ETHROTTLE(mtr) \ argument
74 ((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
76 #define MTR_WIDTH(mtr) \ argument
77 ((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
79 #define MTR_NUMBANK(mtr) \ argument
80 ((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
82 #define MTR_NUMRANK(mtr) (nb_chipset == INTEL_NB_5100 ? 1 : \ argument
83 (((mtr) & (nb_chipset == INTEL_NB_5400 ? 0x0020 : 0x0010)) ? 2 : 1))
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H A Dnb5000_init.c419 nb_fbd_dimm_init(int channel, int dimm, uint16_t mtr) in nb_fbd_dimm_init() argument
424 if (MTR_PRESENT(mtr) == 0) in nb_fbd_dimm_init()
436 dp->mtr_present = MTR_PRESENT(mtr); in nb_fbd_dimm_init()
438 dp->nranks = MTR_NUMRANK(mtr); in nb_fbd_dimm_init()
439 dp->nbanks = MTR_NUMBANK(mtr); in nb_fbd_dimm_init()
440 dp->ncolumn = MTR_NUMCOL(mtr); in nb_fbd_dimm_init()
441 dp->nrow = MTR_NUMROW(mtr); in nb_fbd_dimm_init()
442 dp->width = MTR_WIDTH(mtr); in nb_fbd_dimm_init()
443 dp->dimm_size = MTR_DIMMSIZE(mtr); in nb_fbd_dimm_init()
846 uint16_t mtr; in nb_fbd_dimms_init() local
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