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Searched refs:mem_base (Results 1 – 10 of 10) sorted by relevance

/titanic_41/usr/src/lib/libsasl/lib/
H A Dauxprop.c77 struct proppool *mem_base; member
136 ctx->mem_base = alloc_proppool(VALUES_SIZE + estimate); in prop_init()
137 if(!ctx->mem_base) return SASL_NOMEM; in prop_init()
139 ctx->mem_cur = ctx->mem_base; in prop_init()
141 ctx->values = (struct propval *)ctx->mem_base->data; in prop_init()
142 ctx->mem_base->unused = ctx->mem_base->size - VALUES_SIZE; in prop_init()
146 ctx->data_end = ctx->mem_base->data + ctx->mem_base->size; in prop_init()
147 ctx->list_end = (char **)(ctx->mem_base->data + VALUES_SIZE); in prop_init()
193 pool = src_ctx->mem_base; in prop_dup()
208 retval->mem_base->unused = retval->mem_base->size - values_size; in prop_dup()
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/titanic_41/usr/src/uts/intel/io/pci/
H A Dpci_boot.c897 uint_t io_base, io_limit, mem_base, mem_limit; in fix_ppb_res() local
1175 mem_base = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_MEM_BASE); in fix_ppb_res()
1176 mem_base = (mem_base & 0xfff0) << 16; in fix_ppb_res()
1184 (mem_base > mem_limit) || in fix_ppb_res()
1196 mem_base = 0; in fix_ppb_res()
1200 if (mem_base == 0) { in fix_ppb_res()
1201 mem_base = (uint_t)list->ml_address; in fix_ppb_res()
1202 mem_base = P2ALIGN(mem_base, in fix_ppb_res()
1216 mem_size = mem_limit + 1 - mem_base; in fix_ppb_res()
1217 ASSERT(mem_base <= mem_limit); in fix_ppb_res()
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/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/
H A Dmm_uefi.h138 … (PDEV)->hw_info.mem_base[BAR_1].as_u64 + (DPM_TRIGER_TYPE))), (VAL))
/titanic_41/usr/src/uts/sun4u/io/pci/
H A Dpci_pci.c1483 uint16_t io_base_hi, io_limit_hi, mem_base, mem_limit; in ppb_create_ranges_prop() local
1490 mem_base = pci_config_get16(config_handle, PCI_BCNF_MEM_BASE); in ppb_create_ranges_prop()
1526 base = PPB_32bit_MEMADDR(mem_base); in ppb_create_ranges_prop()
/titanic_41/usr/src/uts/common/io/pciex/
H A Dpcieb.c1786 uint16_t io_base_hi, io_limit_hi, mem_base, mem_limit; in pcieb_create_ranges_prop() local
1793 mem_base = pci_config_get16(config_handle, PCI_BCNF_MEM_BASE); in pcieb_create_ranges_prop()
1821 base = PCIEB_32bit_MEMADDR(mem_base); in pcieb_create_ranges_prop()
/titanic_41/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c4045 uint64_t mem_answer, io_answer, mem_base, io_base, mem_alen, io_alen; in pcicfg_probe_bridge() local
4197 mem_base = mem_answer; in pcicfg_probe_bridge()
4428 range[1].child_low = range[1].parent_low = mem_base; in pcicfg_probe_bridge()
4711 mem_size = mem_end - mem_base; in pcicfg_probe_bridge()
4803 mem_base, mem_size); in pcicfg_probe_bridge()
4816 range[1].child_low = range[1].parent_low = mem_base; in pcicfg_probe_bridge()
4850 (void) ndi_ra_free(ddi_get_parent(new_child), mem_base, in pcicfg_probe_bridge()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dbnxe_context.c649 phy_addr.as_u32.low = (pdev->hw_info.mem_base[BAR_1].as_u32.low) & 0xfffffff0; in lm_allocate_cid()
650 phy_addr.as_u32.high = pdev->hw_info.mem_base[BAR_1].as_u32.high; in lm_allocate_cid()
H A Dlm_devinfo.c467 for (i = 0; i < ARRSIZE(pdev->hw_info.mem_base); i++) in lm_get_bars_info()
469 lm_status = mm_get_bar_offset(pdev, i, &pdev->hw_info.mem_base[i]); in lm_get_bars_info()
470 DbgMessage(pdev, INFORMi, "Bar_Offset=0x%x\n", pdev->hw_info.mem_base[i]); in lm_get_bars_info()
476 if(pdev->hw_info.mem_base[i].as_u64 == 0) in lm_get_bars_info()
491 if(pdev->hw_info.mem_base[i].as_u64 == 0) in lm_get_bars_info()
540 pdev->hw_info.mem_base[i], in lm_get_bars_info()
/titanic_41/usr/src/uts/sun4/io/
H A Dpcicfg.c4899 uint64_t mem_answer, mem_base, mem_alen, mem_size, mem_end; in pcicfg_probe_bridge() local
5025 mem_base = mem_answer; in pcicfg_probe_bridge()
5181 range[1].child_lo = range[1].parent_lo = mem_base; in pcicfg_probe_bridge()
5479 mem_size = mem_end - mem_base; in pcicfg_probe_bridge()
5549 mem_base, mem_size); in pcicfg_probe_bridge()
5559 range[1].child_lo = range[1].parent_lo = mem_base; in pcicfg_probe_bridge()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/
H A Dlm5710.h1617 lm_address_t mem_base[MAX_NUM_BAR]; member