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Searched refs:hxgep (Results 1 – 20 of 20) sorted by relevance

/titanic_41/usr/src/uts/common/io/hxge/
H A Dhxge_main.c96 static hxge_status_t hxge_map_regs(p_hxge_t hxgep);
97 static void hxge_unmap_regs(p_hxge_t hxgep);
99 static hxge_status_t hxge_add_intrs(p_hxge_t hxgep);
100 static void hxge_remove_intrs(p_hxge_t hxgep);
101 static hxge_status_t hxge_add_intrs_adv(p_hxge_t hxgep);
104 static void hxge_intrs_enable(p_hxge_t hxgep);
105 static void hxge_intrs_disable(p_hxge_t hxgep);
143 static hxge_status_t hxge_mac_register(p_hxge_t hxgep);
153 static int hxge_set_priv_prop(p_hxge_t hxgep, const char *pr_name,
155 static int hxge_get_priv_prop(p_hxge_t hxgep, const char *pr_name,
[all …]
H A Dhxge_hw.c38 hxge_global_reset(p_hxge_t hxgep) in hxge_global_reset() argument
40 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_global_reset")); in hxge_global_reset()
42 (void) hxge_intr_hw_disable(hxgep); in hxge_global_reset()
44 if (hxgep->suspended) in hxge_global_reset()
45 (void) hxge_link_init(hxgep); in hxge_global_reset()
47 (void) hxge_vmac_init(hxgep); in hxge_global_reset()
49 (void) hxge_intr_hw_enable(hxgep); in hxge_global_reset()
51 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "<== hxge_global_reset")); in hxge_global_reset()
56 hxge_hw_id_init(p_hxge_t hxgep) in hxge_hw_id_init() argument
58 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_hw_id_init")); in hxge_hw_id_init()
[all …]
H A Dhxge_vmac.c30 hxge_status_t hxge_vmac_init(p_hxge_t hxgep);
31 hxge_status_t hxge_tx_vmac_init(p_hxge_t hxgep);
32 hxge_status_t hxge_rx_vmac_init(p_hxge_t hxgep);
33 hxge_status_t hxge_tx_vmac_enable(p_hxge_t hxgep);
34 hxge_status_t hxge_tx_vmac_disable(p_hxge_t hxgep);
35 hxge_status_t hxge_rx_vmac_enable(p_hxge_t hxgep);
36 hxge_status_t hxge_rx_vmac_disable(p_hxge_t hxgep);
37 hxge_status_t hxge_tx_vmac_reset(p_hxge_t hxgep);
38 hxge_status_t hxge_rx_vmac_reset(p_hxge_t hxgep);
40 hxge_status_t hxge_set_promisc(p_hxge_t hxgep, boolean_t on);
[all …]
H A Dhxge_pfc.c34 static hxge_status_t hxge_pfc_load_hash_table(p_hxge_t hxgep);
35 static uint32_t hxge_get_blade_id(p_hxge_t hxgep);
36 static hxge_status_t hxge_tcam_default_add_entry(p_hxge_t hxgep,
38 static hxge_status_t hxge_tcam_default_config(p_hxge_t hxgep);
41 hxge_classify_init(p_hxge_t hxgep) in hxge_classify_init() argument
45 HXGE_DEBUG_MSG((hxgep, PFC_CTL, "==> hxge_classify_init")); in hxge_classify_init()
47 status = hxge_classify_init_sw(hxgep); in hxge_classify_init()
51 status = hxge_classify_init_hw(hxgep); in hxge_classify_init()
53 (void) hxge_classify_exit_sw(hxgep); in hxge_classify_init()
57 HXGE_DEBUG_MSG((hxgep, PFC_CTL, "<== hxge_classify_init")); in hxge_classify_init()
[all …]
H A Dhxge_txdma.c54 static hxge_status_t hxge_map_txdma(p_hxge_t hxgep);
55 static void hxge_unmap_txdma(p_hxge_t hxgep);
56 static hxge_status_t hxge_txdma_hw_start(p_hxge_t hxgep);
57 static void hxge_txdma_hw_stop(p_hxge_t hxgep);
59 static hxge_status_t hxge_map_txdma_channel(p_hxge_t hxgep, uint16_t channel,
63 static void hxge_unmap_txdma_channel(p_hxge_t hxgep, uint16_t channel,
65 static hxge_status_t hxge_map_txdma_channel_buf_ring(p_hxge_t hxgep, uint16_t,
67 static void hxge_unmap_txdma_channel_buf_ring(p_hxge_t hxgep,
71 static void hxge_unmap_txdma_channel_cfg_ring(p_hxge_t hxgep,
73 static hxge_status_t hxge_txdma_start_channel(p_hxge_t hxgep, uint16_t channel,
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H A Dhxge_fzc.c36 hxge_fzc_intr_init(p_hxge_t hxgep) in hxge_fzc_intr_init() argument
40 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_init")); in hxge_fzc_intr_init()
43 if ((status = hxge_fzc_intr_tmres_set(hxgep)) != HXGE_OK) { in hxge_fzc_intr_init()
51 if ((status = hxge_fzc_intr_ldg_num_set(hxgep)) != HXGE_OK) { in hxge_fzc_intr_init()
56 if ((status = hxge_fzc_intr_sid_set(hxgep)) != HXGE_OK) { in hxge_fzc_intr_init()
60 HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_fzc_intr_init")); in hxge_fzc_intr_init()
66 hxge_fzc_intr_ldg_num_set(p_hxge_t hxgep) in hxge_fzc_intr_ldg_num_set() argument
74 HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_fzc_intr_ldg_num_set")); in hxge_fzc_intr_ldg_num_set()
76 if (hxgep->ldgvp == NULL) { in hxge_fzc_intr_ldg_num_set()
80 ldgp = hxgep->ldgvp->ldgp; in hxge_fzc_intr_ldg_num_set()
[all …]
H A Dhxge_impl.h98 #define HXGE_DEV_HPI_HANDLE(hxgep) (hxgep->hpi_handle) argument
100 #define HPI_PCI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_pci_handle.regh = ah) argument
101 #define HPI_PCI_ADD_HANDLE_SET(hxgep, ap) (hxgep->hpi_pci_handle.regp = ap) argument
103 #define HPI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_handle.regh = ah) argument
104 #define HPI_ADD_HANDLE_SET(hxgep, ap) \ argument
105 hxgep->hpi_handle.is_vraddr = B_FALSE; \
106 hxgep->hpi_handle.function.instance = hxgep->instance; \
107 hxgep->hpi_handle.function.function = 0; \
108 hxgep->hpi_handle.hxgep = (void *) hxgep; \
109 hxgep->hpi_handle.regp = ap;
[all …]
H A Dhxge_virtual.c58 hxge_get_config_properties(p_hxge_t hxgep) in hxge_get_config_properties() argument
62 HXGE_DEBUG_MSG((hxgep, VPD_CTL, " ==> hxge_get_config_properties")); in hxge_get_config_properties()
64 if (hxgep->hxge_hw_p == NULL) { in hxge_get_config_properties()
65 HXGE_ERROR_MSG((hxgep, HXGE_ERR_CTL, in hxge_get_config_properties()
70 hxgep->classifier.tcam_size = TCAM_HXGE_TCAM_MAX_ENTRY; in hxge_get_config_properties()
72 status = hxge_get_mac_addr_properties(hxgep); in hxge_get_config_properties()
74 HXGE_ERROR_MSG((hxgep, HXGE_ERR_CTL, in hxge_get_config_properties()
79 HXGE_DEBUG_MSG((hxgep, VPD_CTL, in hxge_get_config_properties()
82 hxge_use_cfg_hydra_properties(hxgep); in hxge_get_config_properties()
84 HXGE_DEBUG_MSG((hxgep, VPD_CTL, " <== hxge_get_config_properties")); in hxge_get_config_properties()
[all …]
H A Dhxge_rxdma.c60 static hxge_status_t hxge_map_rxdma(p_hxge_t hxgep);
61 static void hxge_unmap_rxdma(p_hxge_t hxgep);
62 static hxge_status_t hxge_rxdma_hw_start_common(p_hxge_t hxgep);
63 static hxge_status_t hxge_rxdma_hw_start(p_hxge_t hxgep);
64 static void hxge_rxdma_hw_stop(p_hxge_t hxgep);
65 static hxge_status_t hxge_map_rxdma_channel(p_hxge_t hxgep, uint16_t channel,
70 static void hxge_unmap_rxdma_channel(p_hxge_t hxgep, uint16_t channel,
72 static hxge_status_t hxge_map_rxdma_channel_cfg_ring(p_hxge_t hxgep,
76 static void hxge_unmap_rxdma_channel_cfg_ring(p_hxge_t hxgep,
78 static hxge_status_t hxge_map_rxdma_channel_buf_ring(p_hxge_t hxgep,
[all …]
H A Dhxge_kstats.c37 hxge_init_statsp(p_hxge_t hxgep) in hxge_init_statsp() argument
41 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_init_statsp")); in hxge_init_statsp()
44 hxgep->statsp = KMEM_ZALLOC(stats_size, KM_SLEEP); in hxge_init_statsp()
45 hxgep->statsp->stats_size = stats_size; in hxge_init_statsp()
47 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_init_statsp")); in hxge_init_statsp()
352 p_hxge_t hxgep; in hxge_tdc_stat_update() local
358 hxgep = (p_hxge_t)ksp->ks_private; in hxge_tdc_stat_update()
359 if (hxgep == NULL) in hxge_tdc_stat_update()
361 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rxstat_update")); in hxge_tdc_stat_update()
368 statsp = (p_hxge_tx_ring_stats_t)&hxgep->statsp->tdc_stats[channel]; in hxge_tdc_stat_update()
[all …]
H A Dhxge_ndd.c69 int hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *,
71 int hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *,
75 static int hxge_param_set_ether_usr(p_hxge_t hxgep, queue_t *, mblk_t *,
77 int hxge_param_set_ip_opt(p_hxge_t hxgep,
79 static int hxge_param_pfc_hash_init(p_hxge_t hxgep,
81 static int hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *,
83 static int hxge_param_get_rxdma_info(p_hxge_t hxgep, queue_t *q,
85 static int hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q,
87 static int hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q,
89 int hxge_param_get_ip_opt(p_hxge_t hxgep,
[all …]
H A Dhxge_fm.c174 hxge_fm_init(p_hxge_t hxgep, ddi_device_acc_attr_t *reg_attr, in hxge_fm_init() argument
179 HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_fm_init")); in hxge_fm_init()
182 hxgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, hxgep->dip, in hxge_fm_init()
186 HXGE_DEBUG_MSG((hxgep, DDI_CTL, in hxge_fm_init()
187 "FM capable = %d\n", hxgep->fm_capabilities)); in hxge_fm_init()
194 if (hxgep->fm_capabilities) in hxge_fm_init()
195 ddi_fm_init(hxgep->dip, &hxgep->fm_capabilities, &iblk); in hxge_fm_init()
200 if (DDI_FM_EREPORT_CAP(hxgep->fm_capabilities) || in hxge_fm_init()
201 DDI_FM_ERRCB_CAP(hxgep->fm_capabilities)) { in hxge_fm_init()
202 pci_ereport_setup(hxgep->dip); in hxge_fm_init()
[all …]
H A Dhxge_send.c39 static int hxge_start(p_hxge_t hxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp);
47 (void) hxge_txdma_reclaim(ring->hxgep, ring, 0); in hxge_tx_ring_task()
50 mac_tx_ring_update(ring->hxgep->mach, ring->ring_handle); in hxge_tx_ring_task()
67 p_hxge_t hxgep; in hxge_tx_ring_send() local
74 hxgep = rhp->hxgep; in hxge_tx_ring_send()
75 tx_ring_p = hxgep->tx_rings->rings[rhp->index]; in hxge_tx_ring_send()
76 ASSERT(hxgep == tx_ring_p->hxgep); in hxge_tx_ring_send()
78 status = hxge_start(hxgep, tx_ring_p, mp); in hxge_tx_ring_send()
88 hxge_start(p_hxge_t hxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) in hxge_start() argument
149 HXGE_DEBUG_MSG((hxgep, TX_CTL, in hxge_start()
[all …]
H A Dhxge_txdma.h126 struct _hxge_t *hxgep; member
181 struct _hxge_t *hxgep; member
204 hxge_status_t hxge_init_txdma_channels(p_hxge_t hxgep);
205 void hxge_uninit_txdma_channels(p_hxge_t hxgep);
208 hxge_status_t hxge_reset_txdma_channel(p_hxge_t hxgep, uint16_t channel,
210 hxge_status_t hxge_init_txdma_channel_event_mask(p_hxge_t hxgep,
212 hxge_status_t hxge_enable_txdma_channel(p_hxge_t hxgep, uint16_t channel,
217 boolean_t hxge_txdma_reclaim(p_hxge_t hxgep,
223 hxge_status_t hxge_txdma_hw_mode(p_hxge_t hxgep, boolean_t enable);
224 void hxge_txdma_stop(p_hxge_t hxgep);
[all …]
H A Dhxge_fzc.h37 hxge_status_t hxge_fzc_intr_init(p_hxge_t hxgep);
38 hxge_status_t hxge_fzc_intr_ldg_num_set(p_hxge_t hxgep);
39 hxge_status_t hxge_fzc_intr_tmres_set(p_hxge_t hxgep);
40 hxge_status_t hxge_fzc_intr_sid_set(p_hxge_t hxgep);
42 hxge_status_t hxge_init_fzc_txdma_channel(p_hxge_t hxgep, uint16_t channel,
45 hxge_status_t hxge_init_fzc_rxdma_channel(p_hxge_t hxgep, uint16_t channel,
48 hxge_status_t hxge_init_fzc_rx_common(p_hxge_t hxgep);
50 hxge_status_t hxge_init_fzc_rxdma_channel_pages(p_hxge_t hxgep,
53 hxge_status_t hxge_init_fzc_txdma_channel_pages(p_hxge_t hxgep,
56 hxge_status_t hxge_fzc_sys_err_mask_set(p_hxge_t hxgep, boolean_t mask);
H A Dhxge_common_impl.h159 MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
163 MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
166 MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
170 MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
173 MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
176 MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
179 MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
182 MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \
185 MUTEX_ENTER(&((hxge_t *)handle.hxgep)->pio_lock); \
187 MUTEX_EXIT(&((hxge_t *)handle.hxgep)->pio_lock); \
[all …]
H A Dhxge_rxdma.h293 struct _hxge_t *hxgep; member
315 struct _hxge_t *hxgep; member
395 struct _hxge_t *hxgep; member
452 struct _hxge_t *hxgep; member
477 hxge_status_t hxge_init_rxdma_channels(p_hxge_t hxgep);
478 void hxge_uninit_rxdma_channels(p_hxge_t hxgep);
479 hxge_status_t hxge_init_rxdma_channel_cntl_stat(p_hxge_t hxgep,
481 hxge_status_t hxge_enable_rxdma_channel(p_hxge_t hxgep,
484 hxge_status_t hxge_rxdma_hw_mode(p_hxge_t hxgep, boolean_t enable);
485 int hxge_rxdma_get_ring_index(p_hxge_t hxgep, uint16_t channel);
[all …]
H A Dhxge.h267 struct _hxge_t *hxgep; member
276 struct _hxge_t *hxgep; member
637 timeout_id_t hxge_start_timer(p_hxge_t hxgep, fptrv_t func, int msec);
638 void hxge_stop_timer(p_hxge_t hxgep, timeout_id_t timerid);
H A Dhxge_virtual.h49 hxge_status_t hxge_intr_mask_mgmt(p_hxge_t hxgep);
H A Dhpi.h158 void *hxgep; member