Home
last modified time | relevance | path

Searched refs:cr0 (Results 1 – 22 of 22) sorted by relevance

/titanic_41/usr/src/uts/i86pc/ml/
H A Dmpcore.s101 movl %cr0, %eax
107 movl %eax, %cr0
175 movl %cr0, %eax
177 movl %eax, %cr0
308 movq %cr0, %rax
311 movq %rax, %cr0 /* set machine status word */
366 movl %cr0, %eax
372 movl %eax, %cr0
407 movl %cr0,%edx
410 movl %edx,%cr0 /* set machine status word */
[all …]
H A Dbios_call_src.s128 MOVCR( %cr0, save_cr0)
228 movl %cr0, %eax
230 movl %eax, %cr0
267 DATASZ movl %eax, %cr0
329 DATASZ movl %eax, %cr0
365 movl %eax, %cr0
H A Dfb_swtch_src.s55 movl %cr0, %eax ;\
57 movl %eax, %cr0
273 movl %cr0, %eax
276 movl %eax, %cr0
H A Dcpr_wakecode.s107 movq %cr0, %rdx
191 movl %cr0, %edx
301 movl %cr0, %eax
303 movl %eax, %cr0
399 movl %cr0, %eax
401 movl %eax, %cr0
719 movq %rdx, %cr0
1061 / By this time GDT and IDT are loaded as is cr0, cr3 and cr4.
H A Dlocore.s204 movq %cr0, %rax
207 movq %rax, %cr0
296 movl %cr0, %eax
303 movl %eax, %cr0 / set the cr0 register correctly and
/titanic_41/usr/src/uts/i86pc/sys/
H A Dmachprivregs.h157 movq %cr0, rtmp; \
159 movq rtmp, %cr0
164 movl %cr0, rtmp; \
166 movl rtmp, %cr0
/titanic_41/usr/src/uts/intel/ia32/ml/
H A Dsseblk.s139 movq %cr0, %rax
153 2: movq %rax, %cr0
185 movl %cr0, %ebx
201 2: movl %ebx, %cr0
315 movq %cr0, %rax
327 5: movq %rax, %cr0
356 movl %cr0, %ebx
370 5: movl %ebx, %cr0
H A Dswtch.s628 movq %cr0, %rax
633 movq %rax, %cr0
700 movl %cr0, %eax
705 movl %eax, %cr0
H A Di86_subr.s518 movq %cr0, %rax
523 movq %rdi, %cr0
580 movl %cr0, %eax
586 movl %eax, %cr0
597 movl %cr0, %eax
604 movl %eax, %cr0
3073 movq %cr0, %rax
3099 movq %cr0, %rax
3139 movl %cr0, %eax
3157 movl %cr0, %eax
/titanic_41/usr/src/cmd/mdb/i86pc/modules/unix/
H A Dunix_sup.s42 movq %cr0, %rax
53 movl %cr0, %eax
H A Dunix.c889 ulong_t cr0, cr4; in crregs_dcmd() local
924 cr0 = kmdb_unix_getcr0(); in crregs_dcmd()
926 mdb_printf("%%cr0 = 0x%08x <%b>\n", cr0, cr0, cr0_flag_bits); in crregs_dcmd()
/titanic_41/usr/src/uts/i86pc/dboot/
H A Ddboot_grub.s175 movl %cr0, %eax
178 movl %eax, %cr0
/titanic_41/usr/src/uts/intel/kdi/ia32/
H A Dkdi_asm.s496 movl %cr0, %ecx
499 movl %ecx, %cr0
607 movl %edx, %cr0
/titanic_41/usr/src/uts/intel/kdi/amd64/
H A Dkdi_asm.s500 movq %cr0, %rcx
503 movq %rcx, %cr0
606 movq %rdx, %cr0
/titanic_41/usr/src/common/bignum/i386/
H A Dbignum_i386_asm.s113 movl %cr0, reg; \
422 movl %ebx, %cr0
710 movl %ebx, %cr0
864 movl %eax, %cr0
/titanic_41/usr/src/common/crypto/modes/amd64/
H A Dgcm_intel.s127 movq %cr0, tmpreg; \
/titanic_41/usr/src/uts/i86pc/os/
H A Dstartup.c2728 ulong_t cr0, cr0_orig, cr4; in pat_sync() local
2732 cr0_orig = cr0 = getcr0(); in pat_sync()
2736 cr0 |= CR0_CD; in pat_sync()
2737 cr0 &= ~CR0_NW; in pat_sync()
2738 setcr0(cr0); in pat_sync()
/titanic_41/usr/src/common/crypto/aes/amd64/
H A Daes_intel.s210 movq %cr0, tmpreg; \
245 movq %cr0, tmpreg; \
/titanic_41/usr/src/grub/grub-0.97/stage2/
H A Dasm.S978 movl %cr0, %eax
980 movl %eax, %cr0
1052 movl %cr0, %eax
1054 movl %eax, %cr0
/titanic_41/usr/src/cmd/lp/model/
H A Dstandard586 nl0 cr0 tab0 bs0 vt0 ff0 \
H A Dtsol_standard603 nl0 cr0 tab0 bs0 vt0 ff0 \
H A Dtsol_standard_foomatic629 nl0 cr0 tab0 bs0 vt0 ff0 \