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Searched refs:cp_edx (Results 1 – 8 of 8) sorted by relevance

/titanic_41/usr/src/uts/i86pc/os/
H A Dcpuid.c379 #define CPI_FEATURES_EDX(cpi) ((cpi)->cpi_std[1].cp_edx)
381 #define CPI_FEATURES_XTD_EDX(cpi) ((cpi)->cpi_extd[1].cp_edx)
413 #define CPI_PREFCH_STRIDE(regs) BITX((regs)->cp_edx, 9, 0)
463 BITX((cpi)->cpi_std[5].cp_edx, c_state + 3, c_state)
494 cp->cp_edx &= in platform_cpuid_mangle()
506 cp->cp_edx &= in platform_cpuid_mangle()
646 regs[2] = cp.cp_edx; in determine_platform()
692 regs[2] = cp.cp_edx; in determine_platform()
973 *iptr++ = cp->cp_edx; in cpuid_pass1()
1048 cp->cp_edx &= ~CPUID_INTC_EDX_SEP; in cpuid_pass1()
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H A Dxpv_platform.c121 xen_signature[2] = cp.cp_edx; in xen_hvm_init()
H A Dpci_mech1_amd.c56 (cp.cp_edx != 0x69746e65) || /* enti */ in pci_check_amd_ioecs()
/titanic_41/usr/src/uts/i86pc/os/cpupm/
H A Dpwrnow.c256 if (!(cpu_regs.cp_edx & AMD_CPUID_TSC_CONSTANT)) { in pwrnow_supported()
266 if (!(cpu_regs.cp_edx & AMD_CPUID_PSTATE_HARDWARE)) { in pwrnow_supported()
291 if (!(cpu_regs.cp_edx & AMD_CPUID_CPB)) in pwrnow_cpb_supported()
/titanic_41/usr/src/lib/libgrubmgmt/common/
H A Dlibgrub_cmd.c69 uint32_t cp_eax, cp_ebx, cp_ecx, cp_edx; in cpuid_64bit_capable() member
77 ret = ((CPUID_AMD_EDX_LM & cpuid_regs.cp_edx) != 0); in cpuid_64bit_capable()
/titanic_41/usr/src/uts/common/io/
H A Dcpuid_drv.c131 crs.cp_ebx = crs.cp_ecx = crs.cp_edx = 0; in cpuid_read()
/titanic_41/usr/src/uts/intel/pcbe/
H A Dcore_pcbe.c1166 num_ffc = cp.cp_edx & 0x1F; in core_pcbe_init()
1167 width_ffc = (cp.cp_edx >> 5) & 0xFF; in core_pcbe_init()
1186 num_ffc = cp.cp_edx & 0x1F; in core_pcbe_init()
1187 width_ffc = (cp.cp_edx >> 5) & 0xFF; in core_pcbe_init()
/titanic_41/usr/src/uts/intel/sys/
H A Dx86_archext.h684 uint32_t cp_edx; member