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Searched refs:clk_factor (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_hw_init_reset.c3798 DbgBreakIf(!pdev->vars.clk_factor); in prs_brb_mem_setup()
3826 mm_wait(pdev,10 * pdev->vars.clk_factor); in prs_brb_mem_setup()
3845 mm_wait(pdev,10 * pdev->vars.clk_factor); in prs_brb_mem_setup()
3892 mm_wait(pdev,10 * pdev->vars.clk_factor ); in prs_brb_mem_setup()
3914 mm_wait(pdev,100 * pdev->vars.clk_factor); in prs_brb_mem_setup()
3988 DbgBreakIf(!pdev->vars.clk_factor); in lm_init_intmem_port()
4193 const u32_t wait_ms = 200*pdev->vars.clk_factor ; in init_common_part()
4204 DbgBreakIf( !pdev->vars.clk_factor ); in init_common_part()
H A Dlm_devinfo.c662 pdev->vars.clk_factor = 1; in lm_get_chip_id_and_mode()
666 pdev->vars.clk_factor = LM_FPGA_FACTOR; in lm_get_chip_id_and_mode()
672 pdev->vars.clk_factor = LM_EMUL_FACTOR; in lm_get_chip_id_and_mode()
3948 wait_cnt_limit*= (u64_t)(pdev->vars.clk_factor) ; in lm_verify_validity_map()
H A Dlm_dmae.c544 u32_t wait_cnt_limit = 10000 * pdev->vars.clk_factor; in lm_dmae_operation_wait()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/
H A Dlm5710.h2245 …u32_t clk_factor ; // clock factor to multiple timeouts in non ASIC (EMUL/FPGA) cases (value is 1 … member