/titanic_41/usr/src/uts/intel/ia32/os/ |
H A D | ddi_i86.c | 237 if (handlep->ah_acc.devacc_attr_version < DDI_DEVICE_ATTR_V1 || in impl_acc_err_init() 239 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_err_init() 240 } else if (handlep->ah_acc.devacc_attr_access == DDI_FLAGERR_ACC && in impl_acc_err_init() 242 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_err_init() 244 if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { in impl_acc_err_init() 279 if (handlep->ah_acc.devacc_attr_version < DDI_DEVICE_ATTR_V1 || in impl_acc_hdl_init() 283 devacc_attr_access = handlep->ah_acc.devacc_attr_access; in impl_acc_hdl_init() 329 if (handlep->ah_acc.devacc_attr_endian_flags == in impl_acc_hdl_init() 365 if (handlep->ah_acc.devacc_attr_endian_flags == in impl_acc_hdl_init() 419 if (handlep->ah_acc.devacc_attr_endian_flags == in impl_acc_hdl_init() [all …]
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/titanic_41/usr/src/uts/sun4/io/ |
H A D | rootnex.c | 438 switch (hp->ah_acc.devacc_attr_endian_flags) { in rootnex_map_handle() 452 switch (hp->ah_acc.devacc_attr_dataorder) { in rootnex_map_handle() 575 switch (hp->ah_acc.devacc_attr_endian_flags) { in rootnex_map() 589 switch (hp->ah_acc.devacc_attr_dataorder) { in rootnex_map()
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/titanic_41/usr/src/uts/i86pc/io/pciex/ |
H A D | npe.c | 404 mp->map_handlep->ah_acc.devacc_attr_access in npe_setup_std_pcicfg_acc() 509 mp->map_handlep->ah_acc.devacc_attr_access in npe_bus_map() 548 mp->map_handlep->ah_acc.devacc_attr_access != in npe_bus_map() 690 mp->map_handlep->ah_acc.devacc_attr_access != in npe_bus_map()
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/titanic_41/usr/src/uts/common/sys/ |
H A D | dditypes.h | 284 ddi_device_acc_attr_t ah_acc; /* device access attributes */ member
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/titanic_41/usr/src/uts/i86pc/io/pci/ |
H A D | pci_common.c | 1145 if (hdlp->ah_acc.devacc_attr_endian_flags == in pci_common_ctlops_poke() 1204 if (hdlp->ah_acc.devacc_attr_endian_flags == in pci_common_ctlops_poke() 1265 if (hp->ah_acc.devacc_attr_endian_flags == DDI_STRUCTURE_BE_ACC) in pci_fm_acc_setup() 1288 if (hp->ah_acc.devacc_attr_access == DDI_CAUTIOUS_ACC) { in pci_fm_acc_setup() 1360 if (hdlp->ah_acc.devacc_attr_endian_flags == in pci_common_ctlops_peek() 1419 if (hdlp->ah_acc.devacc_attr_endian_flags == in pci_common_ctlops_peek()
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/titanic_41/usr/src/uts/sun4/os/ |
H A D | ddi_impl.c | 1385 if (handlep->ah_acc.devacc_attr_version < DDI_DEVICE_ATTR_V1 || in impl_acc_err_init() 1387 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_err_init() 1389 if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { in impl_acc_err_init() 1399 if (handlep->ah_acc.devacc_attr_access == in impl_acc_err_init() 1429 if (handlep->ah_acc.devacc_attr_endian_flags & DDI_STRUCTURE_LE_ACC) { in impl_acc_hdl_init()
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/titanic_41/usr/src/uts/i86pc/os/ |
H A D | ddi_impl.c | 2313 hdlp->ah_acc.devacc_attr_access != DDI_CAUTIOUS_ACC) in pci_peekpoke_check_fma() 2317 hdlp->ah_acc.devacc_attr_access != DDI_CAUTIOUS_ACC) { in pci_peekpoke_check_fma() 2350 if (hdlp->ah_acc.devacc_attr_access == DDI_CAUTIOUS_ACC) { in pci_peekpoke_check_fma() 2353 } else if (hdlp->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { in pci_peekpoke_check_fma() 2373 if (hdlp->ah_acc.devacc_attr_access != DDI_DEFAULT_ACC && in pci_peekpoke_check_fma() 2422 if (hdlp->ah_acc.devacc_attr_access != DDI_DEFAULT_ACC && in pci_peekpoke_check_nofma()
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/titanic_41/usr/src/uts/sun4u/io/pci/ |
H A D | pci_fm.c | 81 fflag = ap->ahi_common.ah_acc.devacc_attr_access; in pci_fm_acc_setup()
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H A D | pci.c | 545 mp->map_handlep->ah_acc.devacc_attr_access != in pci_map()
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/titanic_41/usr/src/uts/sun4v/os/ |
H A D | error.c | 467 else if (hp->ah_acc.devacc_attr_access == in errh_error_protected()
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/titanic_41/usr/src/uts/sun4/io/px/ |
H A D | px_fm.c | 149 fflag = ap->ahi_common.ah_acc.devacc_attr_access; in px_fm_acc_setup()
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/titanic_41/usr/src/uts/sun4u/starcat/io/ |
H A D | fcgp2.c | 947 hp->ah_acc = *accattrp; in gp2_map_phys()
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H A D | axq.c | 1688 hp->ah_acc = *accattrp; in axq_map_phys()
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/titanic_41/usr/src/uts/sun4u/io/px/ |
H A D | px_lib4u.c | 1504 if (hp->ah_acc.devacc_attr_dataorder == DDI_STORECACHING_OK_ACC) in px_lib_map_attr_check() 1505 hp->ah_acc.devacc_attr_dataorder = DDI_STRICTORDER_ACC; in px_lib_map_attr_check()
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/titanic_41/usr/src/uts/i86pc/io/ |
H A D | rootnex.c | 1128 switch (hp->ah_acc.devacc_attr_dataorder) { in rootnex_map_regspec() 1304 switch (hp->ah_acc.devacc_attr_endian_flags) { in rootnex_map_handle() 1317 switch (hp->ah_acc.devacc_attr_dataorder) { in rootnex_map_handle()
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/titanic_41/usr/src/uts/sun4u/cpu/ |
H A D | opl_olympus.c | 2010 else if (hp->ah_acc.devacc_attr_access ==
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H A D | spitfire.c | 1362 else if (hp->ah_acc.devacc_attr_access == in cpu_async_error()
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H A D | us3_common.c | 1859 else if (hp->ah_acc.devacc_attr_access == in cpu_deferred_error()
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/titanic_41/usr/src/uts/sun4/io/efcode/ |
H A D | fcpci.c | 1707 hp->ah_acc = *accattrp; in pci_map_phys()
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/titanic_41/usr/src/uts/common/io/pciex/ |
H A D | pcie.c | 2053 hp->ah_acc = attr; in pcie_map_phys()
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/titanic_41/usr/src/uts/common/vm/ |
H A D | seg_dev.c | 3424 hp->ah_acc = *accattrp; in devmap_devmem_setup() 3543 hp->ah_acc = *accattrp; in devmap_devmem_remap()
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/titanic_41/usr/src/uts/common/xen/os/ |
H A D | xvdi.c | 564 ap->ah_acc = xendev_dc_accattr; in xvdi_map_ring()
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/titanic_41/usr/src/uts/sun4u/io/ |
H A D | opl_cfg.c | 1915 acc_handlep->ah_acc = *accattrp; in opl_map_phys()
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/titanic_41/usr/src/uts/common/os/ |
H A D | sunddi.c | 1020 hp->ah_acc = *accattrp; in ddi_device_mapping_check() 7021 ap->ah_acc = *accattrp; in ddi_dma_mem_alloc() 7267 hp->ah_acc = *accattrp; in ddi_regs_map_setup()
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/titanic_41/usr/src/uts/common/pcmcia/nexus/ |
H A D | pcmcia.c | 4414 hp->ah_acc = attr; in pcmcia_map_reg()
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