xref: /titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/dbg_bus.h (revision f391a51a4e9639750045473dba1cc2831267c93e)
1 #ifndef _DBUS_ST_H
2 #define _DBUS_ST_H
3 
4 #include "bcmtype.h"
5 
6 
7 typedef struct _dbg_reg_write
8 {
9 	u32_t addr;
10 	u32_t value;
11 } dbg_reg_write;
12 
13 
14 typedef struct _dbg_register_set_write
15 {
16 	dbg_reg_write *p_reg;
17 	u32_t count;
18 }	dbg_register_set_write;
19 
20 
21 typedef struct _dbg_reg_group
22 {
23 	dbg_register_set_write dbgCfg;
24 	dbg_register_set_write dbgOn;
25 	dbg_register_set_write dbgOff;
26 	dbg_register_set_write dbgFlush;
27 } dbg_reg_group;
28 
29 
30 typedef struct _dbg_driver_end_read_regs
31 {
32 	u32_t dbg_block_on;
33 	u32_t intr_buffer_read_ptr;
34 	u32_t intr_buffer_wr_ptr;
35 	u32_t ext_buffer_wr_ptr_lsb;
36 	u32_t ext_buffer_wr_ptr_msb;
37 	u32_t dbg_ovl_on_ext_buffer;
38 	u32_t dbg_wrap_ext;
39 } dbg_driver_end_read_regs;
40 
41 
42 typedef struct _dbg_driver_fill_regs
43 {
44 	u32_t ext_buffer_start_addr_lsb;
45 	u32_t ext_buffer_start_addr_msb;
46 	u32_t ext_buffer_size; // in 256 byte blocks
47 	u32_t pci_func_num; // not for E1
48 } dbg_driver_fill_regs;
49 
50 
51 typedef struct _dbg_general_info
52 {
53 	u32_t timestamp;
54 	u32_t chip_num;
55 	u32_t chosen_config;
56 	u32_t path_num;
57 } dbg_general_info;
58 
59 
60 typedef struct _dbg_dump_hdr
61 {
62 	u32_t header_length; // will hold sizeof(dbg_dump_hdr)
63 	dbg_general_info info;
64 	dbg_driver_fill_regs driver_filled_info;
65 	dbg_driver_end_read_regs driver_read_regs;
66 } dbg_dump_hdr;
67 
68 
69 #define DBG_E1	0
70 #define DBG_E1H	1
71 #define DBG_E2	2
72 #define DBG_E3	4
73 extern dbg_general_info dbg_bus_general_info_E1;
74 extern dbg_driver_fill_regs dbg_bus_driver_fill_regs_E1;
75 extern dbg_driver_end_read_regs dbg_bus_driver_end_read_regs_E1;
76 extern dbg_reg_write dbg_bus_all_regs_E1[];
77 extern dbg_reg_group dbg_bus_configs_E1[6];
78 
79 extern dbg_general_info dbg_bus_general_info_E1H;
80 extern dbg_driver_fill_regs dbg_bus_driver_fill_regs_E1H;
81 extern dbg_driver_end_read_regs dbg_bus_driver_end_read_regs_E1H;
82 extern dbg_reg_write dbg_bus_all_regs_E1H[];
83 extern dbg_reg_group dbg_bus_configs_E1H[25];
84 
85 extern dbg_general_info dbg_bus_general_info_E2;
86 extern dbg_driver_fill_regs dbg_bus_driver_fill_regs_E2;
87 extern dbg_driver_end_read_regs dbg_bus_driver_end_read_regs_E2;
88 extern dbg_reg_write dbg_bus_all_regs_E2[];
89 extern dbg_reg_group dbg_bus_configs_E2[25];
90 
91 extern dbg_general_info dbg_bus_general_info_E3;
92 extern dbg_driver_fill_regs dbg_bus_driver_fill_regs_E3;
93 extern dbg_driver_end_read_regs dbg_bus_driver_end_read_regs_E3;
94 extern dbg_reg_write dbg_bus_all_regs_E3[];
95 extern dbg_reg_group dbg_bus_configs_E3[34];
96 
97 
98 
99 #endif //_DBUS_ST_H
100