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Searched refs:V_DIP4_THRES_ENABLE (Results 1 – 1 of 1) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dregs.h1585 #define V_DIP4_THRES_ENABLE(x) ((x) << S_DIP4_THRES_ENABLE) macro
1586 #define F_DIP4_THRES_ENABLE V_DIP4_THRES_ENABLE(1U)