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Searched refs:VAL1 (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/intel/io/amd8111s/
H A Damd8111s_hw.c132 VAL1 | EN_PMGR); in mdlPHYAutoNegotiation()
149 VAL1 | EN_PMGR); in mdlPHYAutoNegotiation()
166 VAL1 | EN_PMGR); in mdlPHYAutoNegotiation()
180 VAL1 | EN_PMGR); in mdlPHYAutoNegotiation()
196 VAL1 | EN_PMGR); in mdlPHYAutoNegotiation()
244 WRITE_REG32(pLayerPointers, MemBaseAddress + CMD3, VAL1 | EN_PMGR); in mdlClearHWConfig()
413 VAL1 | TDMD0); in mdlTransmit()
491 VAL0 | APAD_XMT | REX_RTRY | VAL1 | DXMTFCS | RPA | VAL2); in mdlHWReset()
512 VAL0 | APAD_XMT | REX_RTRY | REX_UFLO | VAL1 | DXMTFCS in mdlHWReset()
1588 VAL1 | MPPLBA); in mdlEnableMagicPacketWakeUp()
H A Damd8111s_hw.h394 #define VAL1 B15_MASK macro
H A Damd8111s_main.c347 VAL1 | FORCE_FULL_DUPLEX | FORCE_LINK_STATUS); in amd8111s_set_loop_mode()