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Searched refs:TX_ADDR_MD_REG (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge_txdma_hw.h67 #define TX_ADDR_MD_REG (FZC_DMC + 0x45000) macro
/titanic_41/usr/src/uts/common/io/nxge/npi/
H A Dnpi_txdma.c95 TX_ADDR_MD_REG,
268 NXGE_REG_WR64(handle, TX_ADDR_MD_REG, mode32.value); in npi_txdma_mode32_set()