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Searched refs:TXDMA_MBL_REG (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/nxge/npi/
H A Dnpi_txdma.c49 TXDMA_MBL_REG,
1439 TXDMA_REG_READ64(handle, TXDMA_MBL_REG, channel, &ml.value); in npi_txdma_mbox_config()
1448 TXDMA_REG_WRITE64(handle, TXDMA_MBL_REG, channel, ml.value); in npi_txdma_mbox_config()
/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge_txdma_hw.h173 #define TXDMA_MBL_REG (DMC + 0x40038) macro