Searched refs:STAT_ISR_TIMER_INI (Results 1 – 2 of 2) sorted by relevance
551 #define STAT_ISR_TIMER_INI 0x0ed0 /* 32 bit ISR Timer Init. Value Reg */ macro
892 CSR_WRITE_4(dev, STAT_ISR_TIMER_INI, 0x0190); in yge_reset()