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Searched refs:RX_DMA_CK_DIV_REG (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/nxge/npi/
H A Dnpi_rxdma.c81 RX_DMA_CK_DIV_REG, DEF_PT0_RDC_REG, DEF_PT1_RDC_REG, DEF_PT2_RDC_REG,
1246 offset = RX_DMA_CK_DIV_REG; in npi_rxdma_cfg_clock_div_set()
/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge_rxdma_hw.h40 #define RX_DMA_CK_DIV_REG (FZC_DMC + 0x00000) macro