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Searched refs:REG_SRAM_DATA_0 (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dvsc7321_reg.h112 #define REG_SRAM_DATA_0(ie) CRA(0x2,ie&1,0x3e) /* FIFO SRAM data lo 8b */ macro
H A Dvsc7326_reg.h118 #define REG_SRAM_DATA_0(ie) CRA(0x2,ie&1,0x3e) /* FIFO SRAM data lo 8b */ macro