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Searched refs:REG_SPI4_ING_SETUP1 (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dvsc7321.c123 { REG_SPI4_ING_SETUP1, 0x00100000 },
H A Dvsc7321_reg.h130 #define REG_SPI4_ING_SETUP1 CRA(0x5,0x0,0x03) /* Ingress Data Training Setup */ macro
H A Dvsc7326_reg.h136 #define REG_SPI4_ING_SETUP1 CRA(0x5,0x0,0x03) /* Ingress Data Training Setup */ macro
H A Dvsc7326.c126 { REG_SPI4_ING_SETUP1, 0x02010000 },