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Searched refs:REG_SPI4_EGR_SETUP0 (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dvsc7321.c122 { REG_SPI4_EGR_SETUP0, 0x0004100f }, /* FIXME: Multiport */
H A Dvsc7321_reg.h132 #define REG_SPI4_EGR_SETUP0 CRA(0x5,0x0,0x05) /* Egress Status Channel Setup */ macro
H A Dvsc7326_reg.h138 #define REG_SPI4_EGR_SETUP0 CRA(0x5,0x0,0x05) /* Egress Status Channel Setup */ macro
H A Dvsc7326.c125 { REG_SPI4_EGR_SETUP0, 0x80001a04 },