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Searched refs:REG_RAM_BIST_RESULT (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dvsc7321_reg.h74 #define REG_RAM_BIST_RESULT CRA(0x7,0x2,0x01) /* RAM BIST Read Status/Result */ macro
H A Dvsc7326_reg.h78 #define REG_RAM_BIST_RESULT CRA(0x7,0x1,0x01) /* RAM BIST Read Status/Result */ macro
H A Dvsc7326.c272 vsc_read(adapter, REG_RAM_BIST_RESULT, &result); in bist_rd()