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Searched refs:REG_R10 (Results 1 – 12 of 12) sorted by relevance

/titanic_41/usr/src/cmd/mdb/intel/mdb/
H A Dproc_amd64dep.c72 { "r10", REG_R10, MDB_TGT_R_EXPORT },
73 { "r10d", REG_R10, MDB_TGT_R_EXPORT | MDB_TGT_R_32 },
74 { "r10w", REG_R10, MDB_TGT_R_EXPORT | MDB_TGT_R_16 },
75 { "r10l", REG_R10, MDB_TGT_R_EXPORT | MDB_TGT_R_8L },
219 grs[REG_RCX], grs[REG_R10]); in pt_regs()
/titanic_41/usr/src/lib/brand/shared/brand/amd64/
H A Dhandler.s84 movq %r10, EH_LOCALS_GREG(REG_R10)(%rbp)
188 movq EH_LOCALS_GREG(REG_R10)(%rbp), %r10 /* restore %r10 */
/titanic_41/usr/src/cmd/mdb/intel/modules/genunix/
H A Dgcore_isadep.c66 grp[REG_R10] = rp->r_r10; in gcore_getgregs()
/titanic_41/usr/src/lib/libc/amd64/threads/
H A Dasm_subr.s130 movq %r10, REGOFF(REG_R10) (%rsp)
/titanic_41/usr/src/lib/libdtrace/i386/
H A Dregs.sed.in76 SED_REPLACE64(REG_R10)
H A Dregs.d.in106 inline int R_R10 = @REG_R10@;
/titanic_41/usr/src/uts/intel/sys/
H A Dregset.h84 #define REG_R10 5 macro
/titanic_41/usr/src/uts/intel/fs/proc/
H A Dprmachdep.c146 dst[REG_R8] = dst[REG_R9] = dst[REG_R10] = dst[REG_R11] = in prgregset_32ton()
/titanic_41/usr/src/uts/intel/dtrace/
H A Dfasttrap_isa.c183 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
1712 case REG_R10: return (rp->r_r10); in fasttrap_getreg()
H A Ddtrace_isa.c605 case REG_R10: in dtrace_getreg()
/titanic_41/usr/src/uts/intel/ia32/os/
H A Darchdep.c460 grp[REG_R10] = rp->r_r10; in getgregs()
721 rp->r_r10 = grp[REG_R10]; in setgregs()
/titanic_41/usr/src/lib/libproc/common/
H A DPcore.c521 lwp->lwp_status.pr_reg[REG_R10] = prs64->pr_reg.lxr_r10; in lx_prstatus64_to_lwp()