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Searched refs:REG_PLL_CLK_SPEED (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dvsc7321.c116 { REG_PLL_CLK_SPEED, 0x00000000 },
118 { REG_PLL_CLK_SPEED, 0x000000d4 },
H A Dvsc7326.c118 { REG_PLL_CLK_SPEED, 0x00050c00 },
119 { REG_PLL_CLK_SPEED, 0x00050c00 },
H A Dvsc7321_reg.h49 #define REG_PLL_CLK_SPEED CRA(0x7,0xf,0x19) /* Clock Speed Selection */ macro
H A Dvsc7326_reg.h51 #define REG_PLL_CLK_SPEED CRA(0x7,0xf,0x19) /* Clock Speed Selection */ macro