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Searched refs:RADEON_RB3D_DSTCACHE_CTLSTAT (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/drm/
H A Dradeon_drv.h586 #define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325c macro
1069 OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
1074 OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0)); \
H A Dradeon_cp.c872 tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT); in radeon_do_pixcache_flush()
874 RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp); in radeon_do_pixcache_flush()
877 if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT) & in radeon_do_pixcache_flush()