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Searched refs:RADEON_PCIE_TX_GART_CNTL (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/drm/
H A Dradeon_cp.c1302 u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL); in radeon_set_pciegart()
1320 RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, in radeon_set_pciegart()
1323 RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, in radeon_set_pciegart()
H A Dradeon_drv.h434 #define RADEON_PCIE_TX_GART_CNTL 0x10 macro