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Searched refs:RADEON_GMC_DST_PITCH_OFFSET_CNTL (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/intel/io/drm/
H A Dr300_cmdbuf.c501 RADEON_GMC_DST_PITCH_OFFSET_CNTL)) { in r300_emit_bitblt_multi()
512 (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) { in r300_emit_bitblt_multi()
H A Dradeon_state.c409 RADEON_GMC_DST_PITCH_OFFSET_CNTL)) { in radeon_check_and_fixup_packet3()
420 (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) { in radeon_check_and_fixup_packet3()
786 OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | in radeon_clear_box()
917 OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | in radeon_cp_dispatch_clear()
938 OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL | in radeon_cp_dispatch_clear()
1433 RADEON_GMC_DST_PITCH_OFFSET_CNTL | in radeon_cp_dispatch_swap()
1938 RADEON_GMC_DST_PITCH_OFFSET_CNTL | in radeon_cp_dispatch_texture()
H A Dradeon_drv.h463 #define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) macro