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Searched refs:PIO (Results 1 – 12 of 12) sorted by relevance

/titanic_41/usr/src/cmd/fm/modules/common/fabric-xlate/
H A Dfx_epkt.c53 EPKT_DESC(PORT, PIO, IRR, RCA, WRITE),
56 EPKT_DESC(PORT, PIO, IRR, RUR, WRITE),
59 EPKT_DESC(PORT, PIO, IRR, INV, RDWR),
62 EPKT_DESC(PORT, PIO, IRR, TO, READ),
64 EPKT_DESC(PORT, PIO, IRR, TO, WRITE),
67 EPKT_DESC(PORT, PIO, IRR, UC, IRR),
/titanic_41/usr/src/cmd/fm/eversholt/files/sparc/sun4u/
H A Dpsycho.esc55 * - pue: the psycho to detect a PIO uncorrectable error, bad reader.
56 * - s-pue: the psycho to detect a secondary PIO UE, bad reader.
57 * - ecc: the SERD engine to gather enough PIO CEs to generate an ereport.
81 * - pce: the psycho to detect a PIO correctable error, bad reader.
92 * - pue: a PIO uncorrectable error.
93 * - s-pue: a secondary PIO UE.
94 * - ecc: the SERD engine to gather enough PIO CEs to generate an ereport.
111 * - pue: a PIO uncorrectable error, where the captured Agentid matches
113 * - ecc: the SERD engine for the CPU to fire due to PIO CEs from this
H A Dschizo.esc75 * - lpq-to: local PIO queue timeout.
76 * - sfpq-to: safari foreign PIO queue timeout.
77 * - ufpq-to: UPA foreign PIO queue timeout.
79 * - pue: PIO uncorrectable error, bad reader.
80 * - s-pue: secondary PIO UE, bad reader.
81 * - ecc: multiple PIO CEs.
133 * - pce: PIO correctable error.
177 * - pue: PIO uncorrectable error.
178 * - ecc: multiple PIO CEs.
212 * - pue: PIO uncorrectable error.
[all …]
H A Dxmits.esc93 * - lpq-to: local PIO queue timeout.
94 * - sfpq-to: safari foreign PIO queue timeout.
96 * - pue: PIO uncorrectable error, bad reader.
97 * - s-pue: secondary PIO UE, bad reader.
98 * - ecc: multiple PIO CEs.
157 * - pce: PIO correctable error.
177 * - pue: PIO uncorrectable error.
178 * - ecc: multiple PIO CEs.
208 * - pue: PIO uncorrectable error.
209 * - s-pue: secondary PIO UE.
[all …]
H A Doberon.esc57 * piowtue-channel PIO write UE
58 * piowbeue-channel PIO write byte enable UE
59 * piorbeue-channel PIO read byte enable UE
H A Dtomatillo.esc203 * - pwpe: jbus PIO write parity error.
/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge_defs.h37 #define PIO 0x000000 macro
H A Dnxge_hw.h80 #define DEV_FUNC_SR_REG (PIO + 0x10000)
/titanic_41/usr/src/uts/sun4u/starcat/ml/
H A Ddrmach_asm.s444 ! address is assumed to be a PIO address which is polled via
/titanic_41/usr/src/uts/common/io/nxge/
H A Dnxge_ndd.c2281 {"PIO", PIO},
/titanic_41/usr/src/data/hwdata/
H A Dpci.ids16150 0b10 PCI-PIO
16403 0400 Lava 8255-PIO-PCI
H A Dusb.ids11492 5544 PIO