Searched refs:PIL_1 (Results 1 – 5 of 5) sorted by relevance
/titanic_41/usr/src/uts/sun4/sys/ |
H A D | intr.h | 45 #define PIL_1 1 macro
|
/titanic_41/usr/src/uts/sun4u/os/ |
H A D | ecc.c | 215 MAX_CE_FLTS * (max_ncpus + 1), size, PIL_1, 0); in error_init()
|
/titanic_41/usr/src/uts/sun4/io/ |
H A D | cbe.c | 199 new_data->cbe_level1_inum = add_softintr(PIL_1, in cbe_configure()
|
/titanic_41/usr/src/uts/sun4/os/ |
H A D | intr.c | 130 siron1_inum = add_softintr(PIL_1, softlevel1, 0, SOFTINT_ST); in intr_init() 311 siron_cpu_inum[cp->cpu_id] = add_softintr(PIL_1, in siron_cpu_setup()
|
/titanic_41/usr/src/uts/sun4v/os/ |
H A D | error.c | 794 MAX_CE_FLTS * (max_ncpus + 1), size, PIL_1, 0); in error_init() 797 NULL, CPU_RQ_ENTRIES, sizeof (errh_er_t), PIL_1, 0); in error_init()
|