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Searched refs:PCI_CONF_BASE4 (Results 1 – 17 of 17) sorted by relevance

/titanic_41/usr/src/uts/sun4u/sys/pci/
H A Ddb21554_config.h53 #define DB_PCONF_DS_MEM3 PCI_CONF_BASE4
58 #define DB_PCONF_US_MEM2 DB_PCONF_SEC_HDR_OFF+PCI_CONF_BASE4
64 #define DB_SCONF_US_MEM2 PCI_CONF_BASE4
67 #define DB_SCONF_DS_MEM3 DB_PCONF_PRI_HDR_OFF+PCI_CONF_BASE4
/titanic_41/usr/src/uts/common/io/igb/
H A Digb_debug.c112 pci_config_get32(handle, PCI_CONF_BASE4)); in pci_dump()
/titanic_41/usr/src/uts/common/sys/
H A Dpci.h57 #define PCI_CONF_BASE4 0x20 /* base register 4, 4 bytes */ macro
/titanic_41/usr/src/uts/common/os/
H A Dsunpci.c523 chsp->chs_base4 = pci_config_get32(confhdl, PCI_CONF_BASE4);
877 pci_config_put32(confhdl, PCI_CONF_BASE4, chs_p->chs_base4);
/titanic_41/usr/src/uts/common/io/ixgbe/
H A Dixgbe_debug.c239 pci_config_get32(handle, PCI_CONF_BASE4)); in ixgbe_pci_dump()
/titanic_41/usr/src/uts/common/io/e1000g/
H A De1000g_debug.c422 pciconfig_bar(Adapter, PCI_CONF_BASE4, "PCI_CONF_BASE4"); in pciconfig_dump()
/titanic_41/usr/src/uts/sun4/io/px/
H A Dpx_tools.c61 PCI_CONF_BASE4,
/titanic_41/usr/src/uts/sun4u/io/pci/
H A Dpci_tools.c94 PCI_CONF_BASE4,
H A Ddb21554.c1060 (off_t)(p_offset + PCI_CONF_BASE4))) & ~DB_IO_BIT)); in db_enable_io()
1637 ph->bar4 = pci_config_get32(config_handle, hdr_off + PCI_CONF_BASE4); in db_pci_get_header()
/titanic_41/usr/src/uts/i86pc/io/pci/
H A Dpci_tools.c72 PCI_CONF_BASE4,
/titanic_41/usr/src/cmd/pcitool/
H A Dpcitool.c279 { PCI_CONF_BASE4, 4, "BAR4", "Base Address Register 4 (@20)" },
/titanic_41/usr/src/uts/common/io/scsi/adapters/pmcs/
H A Dpmcs_fwlog.c759 pci_config_get32(pwp->pci_acc_handle, PCI_CONF_BASE4)); in pmcs_dump_pcie_conf()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge_dbg.c676 pci_config_get32(qlge->pci_handle, PCI_CONF_BASE4); in ql_dump_pci_config()
/titanic_41/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c4369 pci_config_get32(config_handle, PCI_CONF_BASE4),
/titanic_41/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c437 pci_config_get32(config_handle, PCI_CONF_BASE4)); in pcicfg_dump_device_config()
/titanic_41/usr/src/uts/sun4/io/
H A Dpcicfg.c466 pci_config_get32(config_handle, PCI_CONF_BASE4)); in pcicfg_dump_device_config()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_api.c15226 chs.chs_base4 = ql_pci_config_get32(ha, PCI_CONF_BASE4); in ql_save_config_regs()
15291 ql_pci_config_put32(ha, PCI_CONF_BASE4, chs_p->chs_base4); in ql_restore_config_regs()