Home
last modified time | relevance | path

Searched refs:PCICFG_OFFSET (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_power.c438 static const u32_t pcicfg_device_control_offset = PCICFG_OFFSET + PCICFG_DEVICE_CONTROL; in lm_pcie_state_save_for_d3()
457 static const u32_t pcicfg_device_control_offset = PCICFG_OFFSET + PCICFG_DEVICE_CONTROL; in lm_pcie_state_restore_for_d0()
H A Dlm_devinfo.c176 val = REG_RD(pdev, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF); in lm_get_sriov_info()
440 lm_reg_rd_ind(pdev,PCICFG_OFFSET + bar_address,&bar_size); in lm_get_bar_size_direct()
590 pdev->hw_info.grc_didvid = REG_RD(pdev, (PCICFG_OFFSET + PCICFG_VENDOR_ID_OFFSET)); in lm_get_bars_info()
H A Dlm_hw_init_reset.c3639 …REG_WR(pdev,PCICFG_OFFSET + PXPCS_TL_CONTROL_5, (PXPCS_TL_CONTROL_5_ERR_UNSPPORT1 | PXPCS_TL_CONT… in init_pxpcs_common()
3640 REG_WR(pdev,PCICFG_OFFSET + PXPCS_TL_FUNC345_STAT, in init_pxpcs_common()
3642 REG_WR(pdev,PCICFG_OFFSET + PXPCS_TL_FUNC678_STAT, in init_pxpcs_common()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dpcics_reg_driver.h3 #define PCICFG_OFFSET 0x2000 macro