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Searched refs:NLP2020_PMA_PMD_ADDR (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c3424 NLP2020_PMA_PMD_ADDR, NLP2020_PMA_PMD_CTL_REG, rst_val)) in nxge_nlp2020_xcvr_init()
3430 NLP2020_PMA_PMD_ADDR, NLP2020_PMA_PMD_CTL_REG, &ctrl_reg); in nxge_nlp2020_xcvr_init()
3441 NLP2020_PMA_PMD_ADDR, NLP2020_PMA_PMD_CTL_REG, &pmd_ctl)) in nxge_nlp2020_xcvr_init()
3450 NLP2020_PMA_PMD_ADDR, NLP2020_PMA_PMD_CTL_REG, pmd_ctl)) in nxge_nlp2020_xcvr_init()
3511 NLP2020_PMA_PMD_ADDR, NLP2020_OPT_SET_REG, &rx_los)) != NXGE_OK) in nxge_nlp2020_xcvr_init()
3517 NLP2020_PMA_PMD_ADDR, NLP2020_OPT_SET_REG, rx_los)) != NXGE_OK) in nxge_nlp2020_xcvr_init()
3537 NLP2020_PMA_PMD_ADDR, NLP2020_TX_DRV_CTL1_REG, in nxge_nlp2020_xcvr_init()
3541 NLP2020_PMA_PMD_ADDR, NLP2020_TX_DRV_CTL2_REG, in nxge_nlp2020_xcvr_init()
3545 NLP2020_PMA_PMD_ADDR, NLP2020_UC_CTL_REG, in nxge_nlp2020_xcvr_init()
3549 NLP2020_PMA_PMD_ADDR, NLP2020_UC_PC_START_REG, in nxge_nlp2020_xcvr_init()
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/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge_phy_hw.h912 #define NLP2020_PMA_PMD_ADDR 1 macro