Searched refs:NIG_REG_XGXS_SERDES0_MODE_SEL (Results 1 – 3 of 3) sorted by relevance
| /titanic_41/usr/src/uts/common/io/bnxe/577xx/common/ |
| H A D | bnxe_clc.c | 2026 REG_WR(cb, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); in elink_emac_enable()
2037 REG_WR(cb, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 0); in elink_emac_enable()
2050 REG_WR(cb, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1); in elink_emac_enable()
2055 REG_WR(cb, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 0); in elink_emac_enable()
2687 REG_WR(cb, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 0x1); in elink_bmac_enable()
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| /titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
| H A D | lm_hw_init_reset.c | 3562 … REG_WR(pdev,(PORT_ID(pdev) ? NIG_REG_XGXS_SERDES1_MODE_SEL : NIG_REG_XGXS_SERDES0_MODE_SEL),1); in init_nig_port()
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| /titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
| H A D | 57712_reg.h | 10140 #define NIG_REG_XGXS_SERDES0_MODE_SEL … macro
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