1 /* -*- Mode:C; c-basic-offset:4; -*- */
2
3 /*
4 Tulip and clone Etherboot Driver
5
6 By Marty Connor (mdc@thinguin.org)
7 Copyright (C) 2001 Entity Cyber, Inc.
8
9 This software may be used and distributed according to the terms
10 of the GNU Public License, incorporated herein by reference.
11
12 As of April 2001 this driver should support most tulip cards that
13 the Linux tulip driver supports because Donald Becker's Linux media
14 detection code is now included.
15
16 Based on Ken Yap's Tulip Etherboot Driver and Donald Becker's
17 Linux Tulip Driver. Supports N-Way speed auto-configuration on
18 MX98715, MX98715A and MX98725. Support inexpensive PCI 10/100 cards
19 based on the Macronix MX987x5 chip, such as the SOHOware Fast
20 model SFA110A, and the LinkSYS model LNE100TX. The NetGear
21 model FA310X, based on the LC82C168 chip is supported.
22 The TRENDnet TE100-PCIA NIC which uses a genuine Intel 21143-PD
23 chipset is supported. Also, Davicom DM9102's.
24
25 Documentation and source code used:
26 Source for Etherboot driver at
27 http://etherboot.sourceforge.net/
28 MX98715A Data Sheet and MX98715A Application Note
29 on http://www.macronix.com/ (PDF format files)
30 Source for Linux tulip driver at
31 http://cesdis.gsfc.nasa.gov/linux/drivers/tulip.html
32
33 Adapted by Ken Yap from
34 FreeBSD netboot DEC 21143 driver
35 Author: David Sharp
36 date: Nov/98
37
38 Some code fragments were taken from verious places, Ken Yap's
39 etherboot, FreeBSD's if_de.c, and various Linux related files.
40 DEC's manuals for the 21143 and SROM format were very helpful.
41 The Linux de driver development page has a number of links to
42 useful related information. Have a look at:
43 ftp://cesdis.gsfc.nasa.gov/pub/linux/drivers/tulip-devel.html
44 */
45
46 /*********************************************************************/
47 /* Revision History */
48 /*********************************************************************/
49
50 /*
51 07 Sep 2003 timlegge Multicast Support Added
52 11 Apr 2001 mdc [patch to etherboot 4.7.24]
53 Major rewrite to include Linux tulip driver media detection
54 code. This driver should support a lot more cards now.
55 16 Jul 2000 mdc 0.75b11
56 Added support for ADMtek 0985 Centaur-P, a "Comet" tulip clone
57 which is used on the LinkSYS LNE100TX v4.x cards. We already
58 support LNE100TX v2.0 cards, which use a different controller.
59 04 Jul 2000 jam ?
60 Added test of status after receiving a packet from the card.
61 Also uncommented the tulip_disable routine. Stray packets
62 seemed to be causing problems.
63 27 Apr 2000 njl ?
64 29 Feb 2000 mdc 0.75b7
65 Increased reset delay to 3 seconds because Macronix cards seem to
66 need more reset time before card comes back to a usable state.
67 26 Feb 2000 mdc 0.75b6
68 Added a 1 second delay after initializing the transmitter because
69 some cards seem to need the time or they drop the first packet
70 transmitted.
71 23 Feb 2000 mdc 0.75b5
72 removed udelay code and used currticks() for more reliable delay
73 code in reset pause and sanity timeouts. Added function prototypes
74 and TX debugging code.
75 21 Feb 2000 mdc patch to Etherboot 4.4.3
76 Incorporated patches from Bob Edwards and Paul Mackerras of
77 Linuxcare's OZLabs to deal with inefficiencies in tulip_transmit
78 and udelay. We now wait for packet transmission to complete
79 (or sanity timeout).
80 04 Feb 2000 Robert.Edwards@anu.edu.au patch to Etherboot 4.4.2
81 patch to tulip.c that implements the automatic selection of the MII
82 interface on cards using the Intel/DEC 21143 reference design, in
83 particular, the TRENDnet TE100-PCIA NIC which uses a genuine Intel
84 21143-PD chipset.
85 11 Jan 2000 mdc 0.75b4
86 Added support for NetGear FA310TX card based on the LC82C168
87 chip. This should also support Lite-On LC82C168 boards.
88 Added simple MII support. Re-arranged code to better modularize
89 initializations.
90 04 Dec 1999 mdc 0.75b3
91 Added preliminary support for LNE100TX PCI cards. Should work for
92 PNIC2 cards. No MII support, but single interface (RJ45) tulip
93 cards seem to not care.
94 03 Dec 1999 mdc 0.75b2
95 Renamed from mx987x5 to tulip, merged in original tulip init code
96 from tulip.c to support other tulip compatible cards.
97 02 Dec 1999 mdc 0.75b1
98 Released Beta MX987x5 Driver for code review and testing to netboot
99 and thinguin mailing lists.
100 */
101
102 /*********************************************************************/
103 /* Declarations */
104 /*********************************************************************/
105
106 #include "etherboot.h"
107 #include "nic.h"
108 #include "pci.h"
109
110 /* User settable parameters */
111
112 #undef TULIP_DEBUG
113 #undef TULIP_DEBUG_WHERE
114 #ifdef TULIP_DEBUG
115 static int tulip_debug = 2; /* 1 normal messages, 0 quiet .. 7 verbose. */
116 #endif
117
118 #define TX_TIME_OUT 2*TICKS_PER_SEC
119
120 typedef uint8_t u8;
121 typedef int8_t s8;
122 typedef uint16_t u16;
123 typedef int16_t s16;
124 typedef uint32_t u32;
125 typedef int32_t s32;
126
127 /* helpful macros if on a big_endian machine for changing byte order.
128 not strictly needed on Intel */
129 #define get_unaligned(ptr) (*(ptr))
130 #define put_unaligned(val, ptr) ((void)( *(ptr) = (val) ))
131 #define get_u16(ptr) (*(u16 *)(ptr))
132 #define virt_to_le32desc(addr) virt_to_bus(addr)
133
134 #define TULIP_IOTYPE PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0
135 #define TULIP_SIZE 0x80
136
137 /* This is a mysterious value that can be written to CSR11 in the 21040 (only)
138 to support a pre-NWay full-duplex signaling mechanism using short frames.
139 No one knows what it should be, but if left at its default value some
140 10base2(!) packets trigger a full-duplex-request interrupt. */
141 #define FULL_DUPLEX_MAGIC 0x6969
142
143 static const int csr0 = 0x01A00000 | 0x8000;
144
145 /* The possible media types that can be set in options[] are: */
146 #define MEDIA_MASK 31
147 static const char * const medianame[32] = {
148 "10baseT", "10base2", "AUI", "100baseTx",
149 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
150 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
151 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
152 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
153 };
154
155 /* This much match tulip_tbl[]! Note 21142 == 21143. */
156 enum tulip_chips {
157 DC21040=0, DC21041=1, DC21140=2, DC21142=3, DC21143=3,
158 LC82C168, MX98713, MX98715, MX98725, AX88141, AX88140, PNIC2, COMET,
159 COMPEX9881, I21145, XIRCOM
160 };
161
162 enum pci_id_flags_bits {
163 /* Set PCI command register bits before calling probe1(). */
164 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
165 /* Read and map the single following PCI BAR. */
166 PCI_ADDR0=0<<4, PCI_ADDR1=1<<4, PCI_ADDR2=2<<4, PCI_ADDR3=3<<4,
167 PCI_ADDR_64BITS=0x100, PCI_NO_ACPI_WAKE=0x200, PCI_NO_MIN_LATENCY=0x400,
168 PCI_UNUSED_IRQ=0x800,
169 };
170
171 struct pci_id_info {
172 char *name;
173 struct match_info {
174 u32 pci, pci_mask, subsystem, subsystem_mask;
175 u32 revision, revision_mask; /* Only 8 bits. */
176 } id;
177 enum pci_id_flags_bits pci_flags;
178 int io_size; /* Needed for I/O region check or ioremap(). */
179 int drv_flags; /* Driver use, intended as capability flags. */
180 };
181
182 static struct pci_id_info pci_id_tbl[] = {
183 { "Digital DC21040 Tulip", { 0x00021011, 0xffffffff, 0, 0, 0, 0 },
184 TULIP_IOTYPE, 0x80, DC21040 },
185 { "Digital DC21041 Tulip", { 0x00141011, 0xffffffff, 0, 0, 0, 0 },
186 TULIP_IOTYPE, 0x80, DC21041 },
187 { "Digital DS21140A Tulip", { 0x00091011, 0xffffffff, 0,0, 0x20,0xf0 },
188 TULIP_IOTYPE, 0x80, DC21140 },
189 { "Digital DS21140 Tulip", { 0x00091011, 0xffffffff, 0, 0, 0, 0 },
190 TULIP_IOTYPE, 0x80, DC21140 },
191 { "Digital DS21143 Tulip", { 0x00191011, 0xffffffff, 0,0, 65,0xff },
192 TULIP_IOTYPE, TULIP_SIZE, DC21142 },
193 { "Digital DS21142 Tulip", { 0x00191011, 0xffffffff, 0, 0, 0, 0 },
194 TULIP_IOTYPE, TULIP_SIZE, DC21142 },
195 { "Kingston KNE110tx (PNIC)", { 0x000211AD, 0xffffffff, 0xf0022646, 0xffffffff, 0, 0 },
196 TULIP_IOTYPE, 256, LC82C168 },
197 { "Lite-On 82c168 PNIC", { 0x000211AD, 0xffffffff, 0, 0, 0, 0 },
198 TULIP_IOTYPE, 256, LC82C168 },
199 { "Macronix 98713 PMAC", { 0x051210d9, 0xffffffff, 0, 0, 0, 0 },
200 TULIP_IOTYPE, 256, MX98713 },
201 { "Macronix 98715 PMAC", { 0x053110d9, 0xffffffff, 0, 0, 0, 0 },
202 TULIP_IOTYPE, 256, MX98715 },
203 { "Macronix 98725 PMAC", { 0x053110d9, 0xffffffff, 0, 0, 0, 0 },
204 TULIP_IOTYPE, 256, MX98725 },
205 { "ASIX AX88141", { 0x1400125B, 0xffffffff, 0,0, 0x10, 0xf0 },
206 TULIP_IOTYPE, 128, AX88141 },
207 { "ASIX AX88140", { 0x1400125B, 0xffffffff, 0, 0, 0, 0 },
208 TULIP_IOTYPE, 128, AX88140 },
209 { "Lite-On LC82C115 PNIC-II", { 0xc11511AD, 0xffffffff, 0, 0, 0, 0 },
210 TULIP_IOTYPE, 256, PNIC2 },
211 { "ADMtek AN981 Comet", { 0x09811317, 0xffffffff, 0, 0, 0, 0 },
212 TULIP_IOTYPE, 256, COMET },
213 { "ADMTek AN983 Comet", { 0x12161113, 0xffffffff, 0, 0, 0, 0 },
214 TULIP_IOTYPE, 256, COMET },
215 { "ADMtek Centaur-P", { 0x09851317, 0xffffffff, 0, 0, 0, 0 },
216 TULIP_IOTYPE, 256, COMET },
217 { "ADMtek Centaur-C", { 0x19851317, 0xffffffff, 0, 0, 0, 0 },
218 TULIP_IOTYPE, 256, COMET },
219 { "Compex RL100-TX", { 0x988111F6, 0xffffffff, 0, 0, 0, 0 },
220 TULIP_IOTYPE, 128, COMPEX9881 },
221 { "Intel 21145 Tulip", { 0x00398086, 0xffffffff, 0, 0, 0, 0 },
222 TULIP_IOTYPE, 128, I21145 },
223 { "Xircom Tulip clone", { 0x0003115d, 0xffffffff, 0, 0, 0, 0 },
224 TULIP_IOTYPE, 128, XIRCOM },
225 { "Davicom DM9102", { 0x91021282, 0xffffffff, 0, 0, 0, 0 },
226 TULIP_IOTYPE, 0x80, DC21140 },
227 { "Davicom DM9100", { 0x91001282, 0xffffffff, 0, 0, 0, 0 },
228 TULIP_IOTYPE, 0x80, DC21140 },
229 { "Macronix mxic-98715 (EN1217)", { 0x12171113, 0xffffffff, 0, 0, 0, 0 },
230 TULIP_IOTYPE, 256, MX98715 },
231 { 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
232 };
233
234 enum tbl_flag {
235 HAS_MII=1, HAS_MEDIA_TABLE=2, CSR12_IN_SROM=4, ALWAYS_CHECK_MII=8,
236 HAS_PWRDWN=0x10, MC_HASH_ONLY=0x20, /* Hash-only multicast filter. */
237 HAS_PNICNWAY=0x80, HAS_NWAY=0x40, /* Uses internal NWay xcvr. */
238 HAS_INTR_MITIGATION=0x100, IS_ASIX=0x200, HAS_8023X=0x400,
239 };
240
241 /* Note: this table must match enum tulip_chips above. */
242 static struct tulip_chip_table {
243 char *chip_name;
244 int flags;
245 } tulip_tbl[] = {
246 { "Digital DC21040 Tulip", 0},
247 { "Digital DC21041 Tulip", HAS_MEDIA_TABLE | HAS_NWAY },
248 { "Digital DS21140 Tulip", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM },
249 { "Digital DS21143 Tulip", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
250 | HAS_PWRDWN | HAS_NWAY | HAS_INTR_MITIGATION },
251 { "Lite-On 82c168 PNIC", HAS_MII | HAS_PNICNWAY },
252 { "Macronix 98713 PMAC", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM },
253 { "Macronix 98715 PMAC", HAS_MEDIA_TABLE },
254 { "Macronix 98725 PMAC", HAS_MEDIA_TABLE },
255 { "ASIX AX88140", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM
256 | MC_HASH_ONLY | IS_ASIX },
257 { "ASIX AX88141", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
258 | IS_ASIX },
259 { "Lite-On PNIC-II", HAS_MII | HAS_NWAY | HAS_8023X },
260 { "ADMtek Comet", MC_HASH_ONLY },
261 { "Compex 9881 PMAC", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM },
262 { "Intel DS21145 Tulip", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
263 | HAS_PWRDWN | HAS_NWAY },
264 { "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
265 | HAS_PWRDWN | HAS_NWAY },
266 { 0, 0 },
267 };
268
269 /* A full-duplex map for media types. */
270 enum MediaIs {
271 MediaIsFD = 1, MediaAlwaysFD=2, MediaIsMII=4, MediaIsFx=8,
272 MediaIs100=16};
273
274 static const char media_cap[32] =
275 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 20,31,0,0, };
276 static u8 t21040_csr13[] = {2,0x0C,8,4, 4,0,0,0, 0,0,0,0, 4,0,0,0};
277
278 /* 21041 transceiver register settings: 10-T, 10-2, AUI, 10-T, 10T-FD */
279 static u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, };
280 static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
281 static u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
282
283 /* not used
284 static u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, };
285 */
286 static u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, };
287 /* not used
288 static u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
289 */
290
291 /* Offsets to the Command and Status Registers, "CSRs". All accesses
292 must be longword instructions and quadword aligned. */
293 enum tulip_offsets {
294 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28,
295 CSR6=0x30, CSR7=0x38, CSR8=0x40, CSR9=0x48, CSR10=0x50, CSR11=0x58,
296 CSR12=0x60, CSR13=0x68, CSR14=0x70, CSR15=0x78, CSR16=0x80, CSR20=0xA0
297 };
298
299 /* The bits in the CSR5 status registers, mostly interrupt sources. */
300 enum status_bits {
301 TimerInt=0x800, TPLnkFail=0x1000, TPLnkPass=0x10,
302 NormalIntr=0x10000, AbnormalIntr=0x8000,
303 RxJabber=0x200, RxDied=0x100, RxNoBuf=0x80, RxIntr=0x40,
304 TxFIFOUnderflow=0x20, TxJabber=0x08, TxNoBuf=0x04, TxDied=0x02, TxIntr=0x01,
305 };
306
307 /* The configuration bits in CSR6. */
308 enum csr6_mode_bits {
309 TxOn=0x2000, RxOn=0x0002, FullDuplex=0x0200,
310 AcceptBroadcast=0x0100, AcceptAllMulticast=0x0080,
311 AcceptAllPhys=0x0040, AcceptRunt=0x0008,
312 };
313
314
315 enum desc_status_bits {
316 DescOwnded=0x80000000, RxDescFatalErr=0x8000, RxWholePkt=0x0300,
317 };
318
319 struct medialeaf {
320 u8 type;
321 u8 media;
322 unsigned char *leafdata;
323 };
324
325 struct mediatable {
326 u16 defaultmedia;
327 u8 leafcount, csr12dir; /* General purpose pin directions. */
328 unsigned has_mii:1, has_nonmii:1, has_reset:6;
329 u32 csr15dir, csr15val; /* 21143 NWay setting. */
330 struct medialeaf mleaf[0];
331 };
332
333 struct mediainfo {
334 struct mediainfo *next;
335 int info_type;
336 int index;
337 unsigned char *info;
338 };
339
340 /* EEPROM Address width definitions */
341 #define EEPROM_ADDRLEN 6
342 #define EEPROM_SIZE 128 /* 2 << EEPROM_ADDRLEN */
343
344 /* The EEPROM commands include the alway-set leading bit. */
345 #define EE_WRITE_CMD (5 << addr_len)
346 #define EE_READ_CMD (6 << addr_len)
347 #define EE_ERASE_CMD (7 << addr_len)
348
349 /* EEPROM_Ctrl bits. */
350 #define EE_SHIFT_CLK 0x02 /* EEPROM shift clock. */
351 #define EE_CS 0x01 /* EEPROM chip select. */
352 #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
353 #define EE_WRITE_0 0x01
354 #define EE_WRITE_1 0x05
355 #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
356 #define EE_ENB (0x4800 | EE_CS)
357
358 /* Delay between EEPROM clock transitions. Even at 33Mhz current PCI
359 implementations don't overrun the EEPROM clock. We add a bus
360 turn-around to insure that this remains true. */
361 #define eeprom_delay() inl(ee_addr)
362
363 /* Size of transmit and receive buffers */
364 #define BUFLEN 1536
365
366 /* Ring-wrap flag in length field, use for last ring entry.
367 0x01000000 means chain on buffer2 address,
368 0x02000000 means use the ring start address in CSR2/3.
369 Note: Some work-alike chips do not function correctly in chained mode.
370 The ASIX chip works only in chained mode.
371 Thus we indicate ring mode, but always write the 'next' field for
372 chained mode as well. */
373 #define DESC_RING_WRAP 0x02000000
374
375 /* transmit and receive descriptor format */
376 struct tulip_rx_desc {
377 volatile u32 status;
378 u32 length;
379 u32 buffer1, buffer2;
380 };
381
382 struct tulip_tx_desc {
383 volatile u32 status;
384 u32 length;
385 u32 buffer1, buffer2;
386 };
387
388 /*********************************************************************/
389 /* Global Storage */
390 /*********************************************************************/
391
392 static u32 ioaddr;
393
394 /* Note: transmit and receive buffers must be longword aligned and
395 longword divisable */
396
397 #define TX_RING_SIZE 2
398 static struct tulip_tx_desc tx_ring[TX_RING_SIZE] __attribute__ ((aligned(4)));
399 static unsigned char txb[BUFLEN] __attribute__ ((aligned(4)));
400
401 #define RX_RING_SIZE 4
402 static struct tulip_rx_desc rx_ring[RX_RING_SIZE] __attribute__ ((aligned(4)));
403 static unsigned char rxb[RX_RING_SIZE * BUFLEN] __attribute__ ((aligned(4)));
404
405 static struct tulip_private {
406 int cur_rx;
407 int chip_id; /* index into tulip_tbl[] */
408 int pci_id_idx; /* index into pci_id_tbl[] */
409 int revision;
410 int flags;
411 unsigned short vendor_id; /* PCI card vendor code */
412 unsigned short dev_id; /* PCI card device code */
413 unsigned char ehdr[ETH_HLEN]; /* buffer for ethernet header */
414 const char *nic_name;
415 unsigned int csr0, csr6; /* Current CSR0, CSR6 settings. */
416 unsigned int if_port;
417 unsigned int full_duplex; /* Full-duplex operation requested. */
418 unsigned int full_duplex_lock;
419 unsigned int medialock; /* Do not sense media type. */
420 unsigned int mediasense; /* Media sensing in progress. */
421 unsigned int nway, nwayset; /* 21143 internal NWay. */
422 unsigned int default_port;
423 unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */
424 u8 media_table_storage[(sizeof(struct mediatable) + 32*sizeof(struct medialeaf))];
425 u16 sym_advertise, mii_advertise; /* NWay to-advertise. */
426 struct mediatable *mtable;
427 u16 lpar; /* 21143 Link partner ability. */
428 u16 advertising[4]; /* MII advertise, from SROM table. */
429 signed char phys[4], mii_cnt; /* MII device addresses. */
430 int cur_index; /* Current media index. */
431 int saved_if_port;
432 } tpx;
433
434 static struct tulip_private *tp;
435
436 /* Known cards that have old-style EEPROMs.
437 Writing this table is described at
438 http://cesdis.gsfc.nasa.gov/linux/drivers/tulip-drivers/tulip-media.html */
439 static struct fixups {
440 char *name;
441 unsigned char addr0, addr1, addr2;
442 u16 newtable[32]; /* Max length below. */
443 } eeprom_fixups[] = {
444 {"Asante", 0, 0, 0x94, {0x1e00, 0x0000, 0x0800, 0x0100, 0x018c,
445 0x0000, 0x0000, 0xe078, 0x0001, 0x0050, 0x0018 }},
446 {"SMC9332DST", 0, 0, 0xC0, { 0x1e00, 0x0000, 0x0800, 0x041f,
447 0x0000, 0x009E, /* 10baseT */
448 0x0004, 0x009E, /* 10baseT-FD */
449 0x0903, 0x006D, /* 100baseTx */
450 0x0905, 0x006D, /* 100baseTx-FD */ }},
451 {"Cogent EM100", 0, 0, 0x92, { 0x1e00, 0x0000, 0x0800, 0x063f,
452 0x0107, 0x8021, /* 100baseFx */
453 0x0108, 0x8021, /* 100baseFx-FD */
454 0x0100, 0x009E, /* 10baseT */
455 0x0104, 0x009E, /* 10baseT-FD */
456 0x0103, 0x006D, /* 100baseTx */
457 0x0105, 0x006D, /* 100baseTx-FD */ }},
458 {"Maxtech NX-110", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x0513,
459 0x1001, 0x009E, /* 10base2, CSR12 0x10*/
460 0x0000, 0x009E, /* 10baseT */
461 0x0004, 0x009E, /* 10baseT-FD */
462 0x0303, 0x006D, /* 100baseTx, CSR12 0x03 */
463 0x0305, 0x006D, /* 100baseTx-FD CSR12 0x03 */}},
464 {"Accton EN1207", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x051F,
465 0x1B01, 0x0000, /* 10base2, CSR12 0x1B */
466 0x0B00, 0x009E, /* 10baseT, CSR12 0x0B */
467 0x0B04, 0x009E, /* 10baseT-FD,CSR12 0x0B */
468 0x1B03, 0x006D, /* 100baseTx, CSR12 0x1B */
469 0x1B05, 0x006D, /* 100baseTx-FD CSR12 0x1B */
470 }},
471 {0, 0, 0, 0, {}}};
472
473 static const char * block_name[] = {"21140 non-MII", "21140 MII PHY",
474 "21142 Serial PHY", "21142 MII PHY", "21143 SYM PHY", "21143 reset method"};
475
476 /*********************************************************************/
477 /* Function Prototypes */
478 /*********************************************************************/
479 static int mdio_read(struct nic *nic, int phy_id, int location);
480 static void mdio_write(struct nic *nic, int phy_id, int location, int value);
481 static int read_eeprom(unsigned long ioaddr, int location, int addr_len);
482 static void parse_eeprom(struct nic *nic);
483 static int tulip_probe(struct dev *dev, struct pci_device *pci);
484 static void tulip_init_ring(struct nic *nic);
485 static void tulip_reset(struct nic *nic);
486 static void tulip_transmit(struct nic *nic, const char *d, unsigned int t,
487 unsigned int s, const char *p);
488 static int tulip_poll(struct nic *nic, int retrieve);
489 static void tulip_disable(struct dev *dev);
490 static void nway_start(struct nic *nic);
491 static void pnic_do_nway(struct nic *nic);
492 static void select_media(struct nic *nic, int startup);
493 static void init_media(struct nic *nic);
494 static void start_link(struct nic *nic);
495 static int tulip_check_duplex(struct nic *nic);
496
497 static void tulip_wait(unsigned int nticks);
498
499 #ifdef TULIP_DEBUG_WHERE
500 static void whereami(const char *str);
501 #endif
502
503 #ifdef TULIP_DEBUG
504 static void tulip_more(void);
505 #endif
506
507 /*********************************************************************/
508 /* Utility Routines */
509 /*********************************************************************/
510
511 #ifdef TULIP_DEBUG_WHERE
whereami(const char * str)512 static void whereami (const char *str)
513 {
514 printf("%s: %s\n", tp->nic_name, str);
515 /* sleep(2); */
516 }
517 #endif
518
519 #ifdef TULIP_DEBUG
tulip_more(void)520 static void tulip_more(void)
521 {
522 printf("\n\n-- more --");
523 while (!iskey())
524 /* wait */;
525 getchar();
526 printf("\n\n");
527 }
528 #endif /* TULIP_DEBUG */
529
tulip_wait(unsigned int nticks)530 static void tulip_wait(unsigned int nticks)
531 {
532 unsigned int to = currticks() + nticks;
533 while (currticks() < to)
534 /* wait */ ;
535 }
536
537 /*********************************************************************/
538 /* Media Descriptor Code */
539 /*********************************************************************/
540
541 /* MII transceiver control section.
542 Read and write the MII registers using software-generated serial
543 MDIO protocol. See the MII specifications or DP83840A data sheet
544 for details. */
545
546 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
547 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
548 "overclocking" issues or future 66Mhz PCI. */
549 #define mdio_delay() inl(mdio_addr)
550
551 /* Read and write the MII registers using software-generated serial
552 MDIO protocol. It is just different enough from the EEPROM protocol
553 to not share code. The maxium data clock rate is 2.5 Mhz. */
554 #define MDIO_SHIFT_CLK 0x10000
555 #define MDIO_DATA_WRITE0 0x00000
556 #define MDIO_DATA_WRITE1 0x20000
557 #define MDIO_ENB 0x00000 /* Ignore the 0x02000 databook setting. */
558 #define MDIO_ENB_IN 0x40000
559 #define MDIO_DATA_READ 0x80000
560
561 /* MII transceiver control section.
562 Read and write the MII registers using software-generated serial
563 MDIO protocol. See the MII specifications or DP83840A data sheet
564 for details. */
565
mdio_read(struct nic * nic __unused,int phy_id,int location)566 int mdio_read(struct nic *nic __unused, int phy_id, int location)
567 {
568 int i;
569 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
570 int retval = 0;
571 long mdio_addr = ioaddr + CSR9;
572
573 #ifdef TULIP_DEBUG_WHERE
574 whereami("mdio_read\n");
575 #endif
576
577 if (tp->chip_id == LC82C168) {
578 int i = 1000;
579 outl(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
580 inl(ioaddr + 0xA0);
581 inl(ioaddr + 0xA0);
582 while (--i > 0)
583 if ( ! ((retval = inl(ioaddr + 0xA0)) & 0x80000000))
584 return retval & 0xffff;
585 return 0xffff;
586 }
587
588 if (tp->chip_id == COMET) {
589 if (phy_id == 1) {
590 if (location < 7)
591 return inl(ioaddr + 0xB4 + (location<<2));
592 else if (location == 17)
593 return inl(ioaddr + 0xD0);
594 else if (location >= 29 && location <= 31)
595 return inl(ioaddr + 0xD4 + ((location-29)<<2));
596 }
597 return 0xffff;
598 }
599
600 /* Establish sync by sending at least 32 logic ones. */
601 for (i = 32; i >= 0; i--) {
602 outl(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
603 mdio_delay();
604 outl(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
605 mdio_delay();
606 }
607 /* Shift the read command bits out. */
608 for (i = 15; i >= 0; i--) {
609 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
610
611 outl(MDIO_ENB | dataval, mdio_addr);
612 mdio_delay();
613 outl(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
614 mdio_delay();
615 }
616 /* Read the two transition, 16 data, and wire-idle bits. */
617 for (i = 19; i > 0; i--) {
618 outl(MDIO_ENB_IN, mdio_addr);
619 mdio_delay();
620 retval = (retval << 1) | ((inl(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
621 outl(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
622 mdio_delay();
623 }
624 return (retval>>1) & 0xffff;
625 }
626
mdio_write(struct nic * nic __unused,int phy_id,int location,int value)627 void mdio_write(struct nic *nic __unused, int phy_id, int location, int value)
628 {
629 int i;
630 int cmd = (0x5002 << 16) | (phy_id << 23) | (location<<18) | value;
631 long mdio_addr = ioaddr + CSR9;
632
633 #ifdef TULIP_DEBUG_WHERE
634 whereami("mdio_write\n");
635 #endif
636
637 if (tp->chip_id == LC82C168) {
638 int i = 1000;
639 outl(cmd, ioaddr + 0xA0);
640 do
641 if ( ! (inl(ioaddr + 0xA0) & 0x80000000))
642 break;
643 while (--i > 0);
644 return;
645 }
646
647 if (tp->chip_id == COMET) {
648 if (phy_id != 1)
649 return;
650 if (location < 7)
651 outl(value, ioaddr + 0xB4 + (location<<2));
652 else if (location == 17)
653 outl(value, ioaddr + 0xD0);
654 else if (location >= 29 && location <= 31)
655 outl(value, ioaddr + 0xD4 + ((location-29)<<2));
656 return;
657 }
658
659 /* Establish sync by sending 32 logic ones. */
660 for (i = 32; i >= 0; i--) {
661 outl(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
662 mdio_delay();
663 outl(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
664 mdio_delay();
665 }
666 /* Shift the command bits out. */
667 for (i = 31; i >= 0; i--) {
668 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
669 outl(MDIO_ENB | dataval, mdio_addr);
670 mdio_delay();
671 outl(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
672 mdio_delay();
673 }
674 /* Clear out extra bits. */
675 for (i = 2; i > 0; i--) {
676 outl(MDIO_ENB_IN, mdio_addr);
677 mdio_delay();
678 outl(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
679 mdio_delay();
680 }
681 }
682
683 /*********************************************************************/
684 /* EEPROM Reading Code */
685 /*********************************************************************/
686 /* EEPROM routines adapted from the Linux Tulip Code */
687 /* Reading a serial EEPROM is a "bit" grungy, but we work our way
688 through:->.
689 */
read_eeprom(unsigned long ioaddr,int location,int addr_len)690 static int read_eeprom(unsigned long ioaddr, int location, int addr_len)
691 {
692 int i;
693 unsigned short retval = 0;
694 long ee_addr = ioaddr + CSR9;
695 int read_cmd = location | EE_READ_CMD;
696
697 #ifdef TULIP_DEBUG_WHERE
698 whereami("read_eeprom\n");
699 #endif
700
701 outl(EE_ENB & ~EE_CS, ee_addr);
702 outl(EE_ENB, ee_addr);
703
704 /* Shift the read command bits out. */
705 for (i = 4 + addr_len; i >= 0; i--) {
706 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
707 outl(EE_ENB | dataval, ee_addr);
708 eeprom_delay();
709 outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
710 eeprom_delay();
711 }
712 outl(EE_ENB, ee_addr);
713
714 for (i = 16; i > 0; i--) {
715 outl(EE_ENB | EE_SHIFT_CLK, ee_addr);
716 eeprom_delay();
717 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0);
718 outl(EE_ENB, ee_addr);
719 eeprom_delay();
720 }
721
722 /* Terminate the EEPROM access. */
723 outl(EE_ENB & ~EE_CS, ee_addr);
724 return retval;
725 }
726
727 /*********************************************************************/
728 /* EEPROM Parsing Code */
729 /*********************************************************************/
parse_eeprom(struct nic * nic)730 static void parse_eeprom(struct nic *nic)
731 {
732 unsigned char *p, *ee_data = tp->eeprom;
733 int new_advertise = 0;
734 int i;
735
736 #ifdef TULIP_DEBUG_WHERE
737 whereami("parse_eeprom\n");
738 #endif
739
740 tp->mtable = 0;
741 /* Detect an old-style (SA only) EEPROM layout:
742 memcmp(ee_data, ee_data+16, 8). */
743 for (i = 0; i < 8; i ++)
744 if (ee_data[i] != ee_data[16+i])
745 break;
746 if (i >= 8) {
747 /* Do a fix-up based on the vendor half of the station address. */
748 for (i = 0; eeprom_fixups[i].name; i++) {
749 if (nic->node_addr[0] == eeprom_fixups[i].addr0
750 && nic->node_addr[1] == eeprom_fixups[i].addr1
751 && nic->node_addr[2] == eeprom_fixups[i].addr2) {
752 if (nic->node_addr[2] == 0xE8 && ee_data[0x1a] == 0x55)
753 i++; /* An Accton EN1207, not an outlaw Maxtech. */
754 memcpy(ee_data + 26, eeprom_fixups[i].newtable,
755 sizeof(eeprom_fixups[i].newtable));
756 #ifdef TULIP_DEBUG
757 printf("%s: Old format EEPROM on '%s' board.\n%s: Using substitute media control info.\n",
758 tp->nic_name, eeprom_fixups[i].name, tp->nic_name);
759 #endif
760 break;
761 }
762 }
763 if (eeprom_fixups[i].name == NULL) { /* No fixup found. */
764 #ifdef TULIP_DEBUG
765 printf("%s: Old style EEPROM with no media selection information.\n",
766 tp->nic_name);
767 #endif
768 return;
769 }
770 }
771
772 if (ee_data[19] > 1) {
773 #ifdef TULIP_DEBUG
774 printf("%s: Multiport cards (%d ports) may not work correctly.\n",
775 tp->nic_name, ee_data[19]);
776 #endif
777 }
778
779 p = (void *)ee_data + ee_data[27];
780
781 if (ee_data[27] == 0) { /* No valid media table. */
782 #ifdef TULIP_DEBUG
783 if (tulip_debug > 1) {
784 printf("%s: No Valid Media Table. ee_data[27] = %hhX\n",
785 tp->nic_name, ee_data[27]);
786 }
787 #endif
788 } else if (tp->chip_id == DC21041) {
789 int media = get_u16(p);
790 int count = p[2];
791 p += 3;
792
793 printf("%s: 21041 Media table, default media %hX (%s).\n",
794 tp->nic_name, media,
795 media & 0x0800 ? "Autosense" : medianame[media & 15]);
796 for (i = 0; i < count; i++) {
797 unsigned char media_block = *p++;
798 int media_code = media_block & MEDIA_MASK;
799 if (media_block & 0x40)
800 p += 6;
801 switch(media_code) {
802 case 0: new_advertise |= 0x0020; break;
803 case 4: new_advertise |= 0x0040; break;
804 }
805 printf("%s: 21041 media #%d, %s.\n",
806 tp->nic_name, media_code, medianame[media_code]);
807 }
808 } else {
809 unsigned char csr12dir = 0;
810 int count;
811 struct mediatable *mtable;
812 u16 media = get_u16(p);
813
814 p += 2;
815 if (tp->flags & CSR12_IN_SROM)
816 csr12dir = *p++;
817 count = *p++;
818
819 tp->mtable = mtable = (struct mediatable *)&tp->media_table_storage[0];
820
821 mtable->defaultmedia = media;
822 mtable->leafcount = count;
823 mtable->csr12dir = csr12dir;
824 mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0;
825 mtable->csr15dir = mtable->csr15val = 0;
826
827 printf("%s: EEPROM default media type %s.\n", tp->nic_name,
828 media & 0x0800 ? "Autosense" : medianame[media & MEDIA_MASK]);
829
830 for (i = 0; i < count; i++) {
831 struct medialeaf *leaf = &mtable->mleaf[i];
832
833 if ((p[0] & 0x80) == 0) { /* 21140 Compact block. */
834 leaf->type = 0;
835 leaf->media = p[0] & 0x3f;
836 leaf->leafdata = p;
837 if ((p[2] & 0x61) == 0x01) /* Bogus, but Znyx boards do it. */
838 mtable->has_mii = 1;
839 p += 4;
840 } else {
841 switch(leaf->type = p[1]) {
842 case 5:
843 mtable->has_reset = i;
844 leaf->media = p[2] & 0x0f;
845 break;
846 case 1: case 3:
847 mtable->has_mii = 1;
848 leaf->media = 11;
849 break;
850 case 2:
851 if ((p[2] & 0x3f) == 0) {
852 u32 base15 = (p[2] & 0x40) ? get_u16(p + 7) : 0x0008;
853 u16 *p1 = (u16 *)(p + (p[2] & 0x40 ? 9 : 3));
854 mtable->csr15dir = (get_unaligned(p1 + 0)<<16) + base15;
855 mtable->csr15val = (get_unaligned(p1 + 1)<<16) + base15;
856 }
857 /* Fall through. */
858 case 0: case 4:
859 mtable->has_nonmii = 1;
860 leaf->media = p[2] & MEDIA_MASK;
861 switch (leaf->media) {
862 case 0: new_advertise |= 0x0020; break;
863 case 4: new_advertise |= 0x0040; break;
864 case 3: new_advertise |= 0x0080; break;
865 case 5: new_advertise |= 0x0100; break;
866 case 6: new_advertise |= 0x0200; break;
867 }
868 break;
869 default:
870 leaf->media = 19;
871 }
872 leaf->leafdata = p + 2;
873 p += (p[0] & 0x3f) + 1;
874 }
875 #ifdef TULIP_DEBUG
876 if (tulip_debug > 1 && leaf->media == 11) {
877 unsigned char *bp = leaf->leafdata;
878 printf("%s: MII interface PHY %d, setup/reset sequences %d/%d long, capabilities %hhX %hhX.\n",
879 tp->nic_name, bp[0], bp[1], bp[2 + bp[1]*2],
880 bp[5 + bp[2 + bp[1]*2]*2], bp[4 + bp[2 + bp[1]*2]*2]);
881 }
882 #endif
883 printf("%s: Index #%d - Media %s (#%d) described "
884 "by a %s (%d) block.\n",
885 tp->nic_name, i, medianame[leaf->media], leaf->media,
886 leaf->type < 6 ? block_name[leaf->type] : "UNKNOWN",
887 leaf->type);
888 }
889 if (new_advertise)
890 tp->sym_advertise = new_advertise;
891 }
892 }
893
894 /*********************************************************************/
895 /* tulip_init_ring - setup the tx and rx descriptors */
896 /*********************************************************************/
tulip_init_ring(struct nic * nic __unused)897 static void tulip_init_ring(struct nic *nic __unused)
898 {
899 int i;
900
901 #ifdef TULIP_DEBUG_WHERE
902 whereami("tulip_init_ring\n");
903 #endif
904
905 tp->cur_rx = 0;
906
907 for (i = 0; i < RX_RING_SIZE; i++) {
908 rx_ring[i].status = cpu_to_le32(0x80000000);
909 rx_ring[i].length = cpu_to_le32(BUFLEN);
910 rx_ring[i].buffer1 = virt_to_le32desc(&rxb[i * BUFLEN]);
911 rx_ring[i].buffer2 = virt_to_le32desc(&rx_ring[i+1]);
912 }
913 /* Mark the last entry as wrapping the ring. */
914 rx_ring[i-1].length = cpu_to_le32(DESC_RING_WRAP | BUFLEN);
915 rx_ring[i-1].buffer2 = virt_to_le32desc(&rx_ring[0]);
916
917 /* We only use 1 transmit buffer, but we use 2 descriptors so
918 transmit engines have somewhere to point to if they feel the need */
919
920 tx_ring[0].status = 0x00000000;
921 tx_ring[0].buffer1 = virt_to_le32desc(&txb[0]);
922 tx_ring[0].buffer2 = virt_to_le32desc(&tx_ring[1]);
923
924 /* this descriptor should never get used, since it will never be owned
925 by the machine (status will always == 0) */
926 tx_ring[1].status = 0x00000000;
927 tx_ring[1].buffer1 = virt_to_le32desc(&txb[0]);
928 tx_ring[1].buffer2 = virt_to_le32desc(&tx_ring[0]);
929
930 /* Mark the last entry as wrapping the ring, though this should never happen */
931 tx_ring[1].length = cpu_to_le32(DESC_RING_WRAP | BUFLEN);
932 }
933
set_rx_mode(struct nic * nic __unused)934 static void set_rx_mode(struct nic *nic __unused) {
935 int csr6 = inl(ioaddr + CSR6) & ~0x00D5;
936
937 tp->csr6 &= ~0x00D5;
938
939 /* !IFF_PROMISC */
940 tp->csr6 |= AcceptAllMulticast;
941 csr6 |= AcceptAllMulticast;
942
943 outl(csr6, ioaddr + CSR6);
944
945
946
947 }
948
949 /*********************************************************************/
950 /* eth_reset - Reset adapter */
951 /*********************************************************************/
tulip_reset(struct nic * nic)952 static void tulip_reset(struct nic *nic)
953 {
954 int i;
955 unsigned long to;
956
957 #ifdef TULIP_DEBUG_WHERE
958 whereami("tulip_reset\n");
959 #endif
960
961 /* Stop Tx and RX */
962 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);
963
964 /* On some chip revs we must set the MII/SYM port before the reset!? */
965 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii)) {
966 outl(0x814C0000, ioaddr + CSR6);
967 }
968
969 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
970 outl(0x00000001, ioaddr + CSR0);
971 tulip_wait(1);
972
973 /* turn off reset and set cache align=16lword, burst=unlimit */
974 outl(tp->csr0, ioaddr + CSR0);
975
976 /* Wait the specified 50 PCI cycles after a reset */
977 tulip_wait(1);
978
979 /* set up transmit and receive descriptors */
980 tulip_init_ring(nic);
981
982 if (tp->chip_id == PNIC2) {
983 u32 addr_high = (nic->node_addr[1]<<8) + (nic->node_addr[0]<<0);
984 /* This address setting does not appear to impact chip operation?? */
985 outl((nic->node_addr[5]<<8) + nic->node_addr[4] +
986 (nic->node_addr[3]<<24) + (nic->node_addr[2]<<16),
987 ioaddr + 0xB0);
988 outl(addr_high + (addr_high<<16), ioaddr + 0xB8);
989 }
990
991 /* MC_HASH_ONLY boards don't support setup packets */
992 if (tp->flags & MC_HASH_ONLY) {
993 u32 addr_low = cpu_to_le32(get_unaligned((u32 *)nic->node_addr));
994 u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(nic->node_addr+4)));
995
996 /* clear multicast hash filters and setup MAC address filters */
997 if (tp->flags & IS_ASIX) {
998 outl(0, ioaddr + CSR13);
999 outl(addr_low, ioaddr + CSR14);
1000 outl(1, ioaddr + CSR13);
1001 outl(addr_high, ioaddr + CSR14);
1002 outl(2, ioaddr + CSR13);
1003 outl(0, ioaddr + CSR14);
1004 outl(3, ioaddr + CSR13);
1005 outl(0, ioaddr + CSR14);
1006 } else if (tp->chip_id == COMET) {
1007 outl(addr_low, ioaddr + 0xA4);
1008 outl(addr_high, ioaddr + 0xA8);
1009 outl(0, ioaddr + 0xAC);
1010 outl(0, ioaddr + 0xB0);
1011 }
1012 } else {
1013 /* for other boards we send a setup packet to initialize
1014 the filters */
1015 u32 tx_flags = 0x08000000 | 192;
1016
1017 /* construct perfect filter frame with mac address as first match
1018 and broadcast address for all others */
1019 for (i=0; i<192; i++)
1020 txb[i] = 0xFF;
1021 txb[0] = nic->node_addr[0];
1022 txb[1] = nic->node_addr[1];
1023 txb[4] = nic->node_addr[2];
1024 txb[5] = nic->node_addr[3];
1025 txb[8] = nic->node_addr[4];
1026 txb[9] = nic->node_addr[5];
1027
1028 tx_ring[0].length = cpu_to_le32(tx_flags);
1029 tx_ring[0].buffer1 = virt_to_le32desc(&txb[0]);
1030 tx_ring[0].status = cpu_to_le32(0x80000000);
1031 }
1032
1033 /* Point to rx and tx descriptors */
1034 outl(virt_to_le32desc(&rx_ring[0]), ioaddr + CSR3);
1035 outl(virt_to_le32desc(&tx_ring[0]), ioaddr + CSR4);
1036
1037 init_media(nic);
1038
1039 /* set the chip's operating mode (but don't turn on xmit and recv yet) */
1040 outl((tp->csr6 & ~0x00002002), ioaddr + CSR6);
1041
1042 /* send setup packet for cards that support it */
1043 if (!(tp->flags & MC_HASH_ONLY)) {
1044 /* enable transmit wait for completion */
1045 outl(tp->csr6 | 0x00002000, ioaddr + CSR6);
1046 /* immediate transmit demand */
1047 outl(0, ioaddr + CSR1);
1048
1049 to = currticks() + TX_TIME_OUT;
1050 while ((tx_ring[0].status & 0x80000000) && (currticks() < to))
1051 /* wait */ ;
1052
1053 if (currticks() >= to) {
1054 printf ("%s: TX Setup Timeout.\n", tp->nic_name);
1055 }
1056 }
1057
1058 if (tp->chip_id == LC82C168)
1059 tulip_check_duplex(nic);
1060
1061 set_rx_mode(nic);
1062
1063 /* enable transmit and receive */
1064 outl(tp->csr6 | 0x00002002, ioaddr + CSR6);
1065 }
1066
1067 /*********************************************************************/
1068 /* eth_transmit - Transmit a frame */
1069 /*********************************************************************/
tulip_transmit(struct nic * nic,const char * d,unsigned int t,unsigned int s,const char * p)1070 static void tulip_transmit(struct nic *nic, const char *d, unsigned int t,
1071 unsigned int s, const char *p)
1072 {
1073 u16 nstype;
1074 u32 to;
1075 u32 csr6 = inl(ioaddr + CSR6);
1076
1077 #ifdef TULIP_DEBUG_WHERE
1078 whereami("tulip_transmit\n");
1079 #endif
1080
1081 /* Disable Tx */
1082 outl(csr6 & ~0x00002000, ioaddr + CSR6);
1083
1084 memcpy(txb, d, ETH_ALEN);
1085 memcpy(txb + ETH_ALEN, nic->node_addr, ETH_ALEN);
1086 nstype = htons((u16) t);
1087 memcpy(txb + 2 * ETH_ALEN, (u8 *)&nstype, 2);
1088 memcpy(txb + ETH_HLEN, p, s);
1089
1090 s += ETH_HLEN;
1091 s &= 0x0FFF;
1092
1093 /* pad to minimum packet size */
1094 while (s < ETH_ZLEN)
1095 txb[s++] = '\0';
1096
1097 #ifdef TULIP_DEBUG
1098 if (tulip_debug > 1)
1099 printf("%s: sending %d bytes ethtype %hX\n", tp->nic_name, s, t);
1100 #endif
1101
1102 /* setup the transmit descriptor */
1103 /* 0x60000000 = no interrupt on completion */
1104 tx_ring[0].length = cpu_to_le32(0x60000000 | s);
1105 tx_ring[0].status = cpu_to_le32(0x80000000);
1106
1107 /* Point to transmit descriptor */
1108 outl(virt_to_le32desc(&tx_ring[0]), ioaddr + CSR4);
1109
1110 /* Enable Tx */
1111 outl(csr6 | 0x00002000, ioaddr + CSR6);
1112 /* immediate transmit demand */
1113 outl(0, ioaddr + CSR1);
1114
1115 to = currticks() + TX_TIME_OUT;
1116 while ((tx_ring[0].status & 0x80000000) && (currticks() < to))
1117 /* wait */ ;
1118
1119 if (currticks() >= to) {
1120 printf ("TX Timeout!\n");
1121 }
1122
1123 /* Disable Tx */
1124 outl(csr6 & ~0x00002000, ioaddr + CSR6);
1125 }
1126
1127 /*********************************************************************/
1128 /* eth_poll - Wait for a frame */
1129 /*********************************************************************/
tulip_poll(struct nic * nic,int retrieve)1130 static int tulip_poll(struct nic *nic, int retrieve)
1131 {
1132
1133 #ifdef TULIP_DEBUG_WHERE
1134 whereami("tulip_poll\n");
1135 #endif
1136
1137 /* no packet waiting. packet still owned by NIC */
1138 if (rx_ring[tp->cur_rx].status & 0x80000000)
1139 return 0;
1140
1141 if ( ! retrieve ) return 1;
1142
1143 #ifdef TULIP_DEBUG_WHERE
1144 whereami("tulip_poll got one\n");
1145 #endif
1146
1147 nic->packetlen = (rx_ring[tp->cur_rx].status & 0x3FFF0000) >> 16;
1148
1149 /* if we get a corrupted packet. throw it away and move on */
1150 if (rx_ring[tp->cur_rx].status & 0x00008000) {
1151 /* return the descriptor and buffer to receive ring */
1152 rx_ring[tp->cur_rx].status = 0x80000000;
1153 tp->cur_rx = (++tp->cur_rx) % RX_RING_SIZE;
1154 return 0;
1155 }
1156
1157 /* copy packet to working buffer */
1158 memcpy(nic->packet, rxb + tp->cur_rx * BUFLEN, nic->packetlen);
1159
1160 /* return the descriptor and buffer to receive ring */
1161 rx_ring[tp->cur_rx].status = 0x80000000;
1162 tp->cur_rx = (++tp->cur_rx) % RX_RING_SIZE;
1163
1164 return 1;
1165 }
1166
1167 /*********************************************************************/
1168 /* eth_disable - Disable the interface */
1169 /*********************************************************************/
tulip_disable(struct dev * dev)1170 static void tulip_disable(struct dev *dev)
1171 {
1172 struct nic *nic = (struct nic *)dev;
1173 #ifdef TULIP_DEBUG_WHERE
1174 whereami("tulip_disable\n");
1175 #endif
1176
1177 /* merge reset and disable */
1178 tulip_reset(nic);
1179
1180 /* disable interrupts */
1181 outl(0x00000000, ioaddr + CSR7);
1182
1183 /* Stop the chip's Tx and Rx processes. */
1184 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);
1185
1186 /* Clear the missed-packet counter. */
1187 (volatile unsigned long)inl(ioaddr + CSR8);
1188 }
1189
1190 /*********************************************************************/
1191 /*IRQ - Enable, Disable, or Force interrupts */
1192 /*********************************************************************/
tulip_irq(struct nic * nic __unused,irq_action_t action __unused)1193 static void tulip_irq(struct nic *nic __unused, irq_action_t action __unused)
1194 {
1195 switch ( action ) {
1196 case DISABLE :
1197 break;
1198 case ENABLE :
1199 break;
1200 case FORCE :
1201 break;
1202 }
1203 }
1204
1205 /*********************************************************************/
1206 /* eth_probe - Look for an adapter */
1207 /*********************************************************************/
tulip_probe(struct dev * dev,struct pci_device * pci)1208 static int tulip_probe(struct dev *dev, struct pci_device *pci)
1209 {
1210 struct nic *nic = (struct nic *)dev;
1211 u32 i;
1212 u8 chip_rev;
1213 u8 ee_data[EEPROM_SIZE];
1214 unsigned short sum;
1215 int chip_idx;
1216 static unsigned char last_phys_addr[ETH_ALEN] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1217
1218 if (pci->ioaddr == 0)
1219 return 0;
1220
1221 ioaddr = pci->ioaddr;
1222 nic->ioaddr = pci->ioaddr & ~3;
1223 nic->irqno = 0;
1224
1225 /* point to private storage */
1226 tp = &tpx;
1227
1228 tp->vendor_id = pci->vendor;
1229 tp->dev_id = pci->dev_id;
1230 tp->nic_name = pci->name;
1231
1232 tp->if_port = 0;
1233 tp->default_port = 0;
1234
1235 adjust_pci_device(pci);
1236
1237 /* disable interrupts */
1238 outl(0x00000000, ioaddr + CSR7);
1239
1240 /* Stop the chip's Tx and Rx processes. */
1241 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);
1242
1243 /* Clear the missed-packet counter. */
1244 (volatile unsigned long)inl(ioaddr + CSR8);
1245
1246 printf("\n"); /* so we start on a fresh line */
1247 #ifdef TULIP_DEBUG_WHERE
1248 whereami("tulip_probe\n");
1249 #endif
1250
1251 #ifdef TULIP_DEBUG
1252 if (tulip_debug > 1)
1253 printf ("%s: Looking for Tulip Chip: Vendor=%hX Device=%hX\n", tp->nic_name,
1254 tp->vendor_id, tp->dev_id);
1255 #endif
1256
1257 /* Figure out which chip we're dealing with */
1258 i = 0;
1259 chip_idx = -1;
1260
1261 while (pci_id_tbl[i].name) {
1262 if ( (((u32) tp->dev_id << 16) | tp->vendor_id) ==
1263 (pci_id_tbl[i].id.pci & pci_id_tbl[i].id.pci_mask) ) {
1264 chip_idx = pci_id_tbl[i].drv_flags;
1265 break;
1266 }
1267 i++;
1268 }
1269
1270 if (chip_idx == -1) {
1271 printf ("%s: Unknown Tulip Chip: Vendor=%hX Device=%hX\n", tp->nic_name,
1272 tp->vendor_id, tp->dev_id);
1273 return 0;
1274 }
1275
1276 tp->pci_id_idx = i;
1277 tp->flags = tulip_tbl[chip_idx].flags;
1278
1279 #ifdef TULIP_DEBUG
1280 if (tulip_debug > 1) {
1281 printf ("%s: tp->pci_id_idx == %d, name == %s\n", tp->nic_name,
1282 tp->pci_id_idx, pci_id_tbl[tp->pci_id_idx].name);
1283 printf ("%s: chip_idx == %d, name == %s\n", tp->nic_name, chip_idx,
1284 tulip_tbl[chip_idx].chip_name);
1285 }
1286 #endif
1287
1288 /* Bring the 21041/21143 out of sleep mode.
1289 Caution: Snooze mode does not work with some boards! */
1290 if (tp->flags & HAS_PWRDWN)
1291 pcibios_write_config_dword(pci->bus, pci->devfn, 0x40, 0x00000000);
1292
1293 if (inl(ioaddr + CSR5) == 0xFFFFFFFF) {
1294 printf("%s: The Tulip chip at %X is not functioning.\n",
1295 tp->nic_name, ioaddr);
1296 return 0;
1297 }
1298
1299 pcibios_read_config_byte(pci->bus, pci->devfn, PCI_REVISION, &chip_rev);
1300
1301 printf("%s: [chip: %s] rev %d at %hX\n", tp->nic_name,
1302 tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
1303 printf("%s: Vendor=%hX Device=%hX", tp->nic_name, tp->vendor_id, tp->dev_id);
1304
1305 if (chip_idx == DC21041 && inl(ioaddr + CSR9) & 0x8000) {
1306 printf(" 21040 compatible mode.");
1307 chip_idx = DC21040;
1308 }
1309
1310 printf("\n");
1311
1312 /* The SROM/EEPROM interface varies dramatically. */
1313 sum = 0;
1314 if (chip_idx == DC21040) {
1315 outl(0, ioaddr + CSR9); /* Reset the pointer with a dummy write. */
1316 for (i = 0; i < ETH_ALEN; i++) {
1317 int value, boguscnt = 100000;
1318 do
1319 value = inl(ioaddr + CSR9);
1320 while (value < 0 && --boguscnt > 0);
1321 nic->node_addr[i] = value;
1322 sum += value & 0xff;
1323 }
1324 } else if (chip_idx == LC82C168) {
1325 for (i = 0; i < 3; i++) {
1326 int value, boguscnt = 100000;
1327 outl(0x600 | i, ioaddr + 0x98);
1328 do
1329 value = inl(ioaddr + CSR9);
1330 while (value < 0 && --boguscnt > 0);
1331 put_unaligned(le16_to_cpu(value), ((u16*)nic->node_addr) + i);
1332 sum += value & 0xffff;
1333 }
1334 } else if (chip_idx == COMET) {
1335 /* No need to read the EEPROM. */
1336 put_unaligned(inl(ioaddr + 0xA4), (u32 *)nic->node_addr);
1337 put_unaligned(inl(ioaddr + 0xA8), (u16 *)(nic->node_addr + 4));
1338 for (i = 0; i < ETH_ALEN; i ++)
1339 sum += nic->node_addr[i];
1340 } else {
1341 /* A serial EEPROM interface, we read now and sort it out later. */
1342 int sa_offset = 0;
1343 int ee_addr_size = read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
1344
1345 for (i = 0; i < sizeof(ee_data)/2; i++)
1346 ((u16 *)ee_data)[i] =
1347 le16_to_cpu(read_eeprom(ioaddr, i, ee_addr_size));
1348
1349 /* DEC now has a specification (see Notes) but early board makers
1350 just put the address in the first EEPROM locations. */
1351 /* This does memcmp(eedata, eedata+16, 8) */
1352 for (i = 0; i < 8; i ++)
1353 if (ee_data[i] != ee_data[16+i])
1354 sa_offset = 20;
1355 if (ee_data[0] == 0xff && ee_data[1] == 0xff && ee_data[2] == 0) {
1356 sa_offset = 2; /* Grrr, damn Matrox boards. */
1357 }
1358 for (i = 0; i < ETH_ALEN; i ++) {
1359 nic->node_addr[i] = ee_data[i + sa_offset];
1360 sum += ee_data[i + sa_offset];
1361 }
1362 }
1363 /* Lite-On boards have the address byte-swapped. */
1364 if ((nic->node_addr[0] == 0xA0 || nic->node_addr[0] == 0xC0)
1365 && nic->node_addr[1] == 0x00)
1366 for (i = 0; i < ETH_ALEN; i+=2) {
1367 char tmp = nic->node_addr[i];
1368 nic->node_addr[i] = nic->node_addr[i+1];
1369 nic->node_addr[i+1] = tmp;
1370 }
1371
1372 if (sum == 0 || sum == ETH_ALEN*0xff) {
1373 printf("%s: EEPROM not present!\n", tp->nic_name);
1374 for (i = 0; i < ETH_ALEN-1; i++)
1375 nic->node_addr[i] = last_phys_addr[i];
1376 nic->node_addr[i] = last_phys_addr[i] + 1;
1377 }
1378
1379 for (i = 0; i < ETH_ALEN; i++)
1380 last_phys_addr[i] = nic->node_addr[i];
1381
1382 printf("%s: %! at ioaddr %hX\n", tp->nic_name, nic->node_addr, ioaddr);
1383
1384 tp->chip_id = chip_idx;
1385 tp->revision = chip_rev;
1386 tp->csr0 = csr0;
1387
1388 /* BugFixes: The 21143-TD hangs with PCI Write-and-Invalidate cycles.
1389 And the ASIX must have a burst limit or horrible things happen. */
1390 if (chip_idx == DC21143 && chip_rev == 65)
1391 tp->csr0 &= ~0x01000000;
1392 else if (tp->flags & IS_ASIX)
1393 tp->csr0 |= 0x2000;
1394
1395 if (media_cap[tp->default_port] & MediaIsMII) {
1396 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1397 tp->mii_advertise = media2advert[tp->default_port - 9];
1398 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1399 }
1400
1401 /* This is logically part of the probe routine, but too complex
1402 to write inline. */
1403 if (tp->flags & HAS_MEDIA_TABLE) {
1404 memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom));
1405 parse_eeprom(nic);
1406 }
1407
1408 start_link(nic);
1409
1410 /* reset the device and make ready for tx and rx of packets */
1411 tulip_reset(nic);
1412
1413 dev->disable = tulip_disable;
1414 nic->poll = tulip_poll;
1415 nic->transmit = tulip_transmit;
1416 nic->irq = tulip_irq;
1417
1418 /* give the board a chance to reset before returning */
1419 tulip_wait(4*TICKS_PER_SEC);
1420
1421 return 1;
1422 }
1423
start_link(struct nic * nic)1424 static void start_link(struct nic *nic)
1425 {
1426 int i;
1427
1428 #ifdef TULIP_DEBUG_WHERE
1429 whereami("start_link\n");
1430 #endif
1431
1432 if ((tp->flags & ALWAYS_CHECK_MII) ||
1433 (tp->mtable && tp->mtable->has_mii) ||
1434 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1435 unsigned int phy, phy_idx;
1436 if (tp->mtable && tp->mtable->has_mii) {
1437 for (i = 0; i < tp->mtable->leafcount; i++)
1438 if (tp->mtable->mleaf[i].media == 11) {
1439 tp->cur_index = i;
1440 tp->saved_if_port = tp->if_port;
1441 select_media(nic, 2);
1442 tp->if_port = tp->saved_if_port;
1443 break;
1444 }
1445 }
1446
1447 /* Find the connected MII xcvrs. */
1448 for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(tp->phys);
1449 phy++) {
1450 int mii_status = mdio_read(nic, phy, 1);
1451 if ((mii_status & 0x8301) == 0x8001 ||
1452 ((mii_status & 0x8000) == 0 && (mii_status & 0x7800) != 0)) {
1453 int mii_reg0 = mdio_read(nic, phy, 0);
1454 int mii_advert = mdio_read(nic, phy, 4);
1455 int to_advert;
1456
1457 if (tp->mii_advertise)
1458 to_advert = tp->mii_advertise;
1459 else if (tp->advertising[phy_idx])
1460 to_advert = tp->advertising[phy_idx];
1461 else /* Leave unchanged. */
1462 tp->mii_advertise = to_advert = mii_advert;
1463
1464 tp->phys[phy_idx++] = phy;
1465 printf("%s: MII transceiver %d config %hX status %hX advertising %hX.\n",
1466 tp->nic_name, phy, mii_reg0, mii_status, mii_advert);
1467 /* Fixup for DLink with miswired PHY. */
1468 if (mii_advert != to_advert) {
1469 printf("%s: Advertising %hX on PHY %d previously advertising %hX.\n",
1470 tp->nic_name, to_advert, phy, mii_advert);
1471 mdio_write(nic, phy, 4, to_advert);
1472 }
1473 /* Enable autonegotiation: some boards default to off. */
1474 mdio_write(nic, phy, 0, mii_reg0 |
1475 (tp->full_duplex ? 0x1100 : 0x1000) |
1476 (media_cap[tp->default_port]&MediaIs100 ? 0x2000:0));
1477 }
1478 }
1479 tp->mii_cnt = phy_idx;
1480 if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
1481 printf("%s: ***WARNING***: No MII transceiver found!\n",
1482 tp->nic_name);
1483 tp->phys[0] = 1;
1484 }
1485 }
1486
1487 /* Reset the xcvr interface and turn on heartbeat. */
1488 switch (tp->chip_id) {
1489 case DC21040:
1490 outl(0x00000000, ioaddr + CSR13);
1491 outl(0x00000004, ioaddr + CSR13);
1492 break;
1493 case DC21041:
1494 /* This is nway_start(). */
1495 if (tp->sym_advertise == 0)
1496 tp->sym_advertise = 0x0061;
1497 outl(0x00000000, ioaddr + CSR13);
1498 outl(0xFFFFFFFF, ioaddr + CSR14);
1499 outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
1500 outl(inl(ioaddr + CSR6) | 0x0200, ioaddr + CSR6);
1501 outl(0x0000EF01, ioaddr + CSR13);
1502 break;
1503 case DC21140: default:
1504 if (tp->mtable)
1505 outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1506 break;
1507 case DC21142:
1508 case PNIC2:
1509 if (tp->mii_cnt || media_cap[tp->if_port] & MediaIsMII) {
1510 outl(0x82020000, ioaddr + CSR6);
1511 outl(0x0000, ioaddr + CSR13);
1512 outl(0x0000, ioaddr + CSR14);
1513 outl(0x820E0000, ioaddr + CSR6);
1514 } else
1515 nway_start(nic);
1516 break;
1517 case LC82C168:
1518 if ( ! tp->mii_cnt) {
1519 tp->nway = 1;
1520 tp->nwayset = 0;
1521 outl(0x00420000, ioaddr + CSR6);
1522 outl(0x30, ioaddr + CSR12);
1523 outl(0x0001F078, ioaddr + 0xB8);
1524 outl(0x0201F078, ioaddr + 0xB8); /* Turn on autonegotiation. */
1525 }
1526 break;
1527 case MX98713: case COMPEX9881:
1528 outl(0x00000000, ioaddr + CSR6);
1529 outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1530 outl(0x00000001, ioaddr + CSR13);
1531 break;
1532 case MX98715: case MX98725:
1533 outl(0x01a80000, ioaddr + CSR6);
1534 outl(0xFFFFFFFF, ioaddr + CSR14);
1535 outl(0x00001000, ioaddr + CSR12);
1536 break;
1537 case COMET:
1538 /* No initialization necessary. */
1539 break;
1540 }
1541 }
1542
nway_start(struct nic * nic __unused)1543 static void nway_start(struct nic *nic __unused)
1544 {
1545 int csr14 = ((tp->sym_advertise & 0x0780) << 9) |
1546 ((tp->sym_advertise&0x0020)<<1) | 0xffbf;
1547
1548 #ifdef TULIP_DEBUG_WHERE
1549 whereami("nway_start\n");
1550 #endif
1551
1552 tp->if_port = 0;
1553 tp->nway = tp->mediasense = 1;
1554 tp->nwayset = tp->lpar = 0;
1555 if (tp->chip_id == PNIC2) {
1556 tp->csr6 = 0x01000000 | (tp->sym_advertise & 0x0040 ? 0x0200 : 0);
1557 return;
1558 }
1559 #ifdef TULIP_DEBUG
1560 if (tulip_debug > 1)
1561 printf("%s: Restarting internal NWay autonegotiation, %X.\n",
1562 tp->nic_name, csr14);
1563 #endif
1564 outl(0x0001, ioaddr + CSR13);
1565 outl(csr14, ioaddr + CSR14);
1566 tp->csr6 = 0x82420000 | (tp->sym_advertise & 0x0040 ? 0x0200 : 0);
1567 outl(tp->csr6, ioaddr + CSR6);
1568 if (tp->mtable && tp->mtable->csr15dir) {
1569 outl(tp->mtable->csr15dir, ioaddr + CSR15);
1570 outl(tp->mtable->csr15val, ioaddr + CSR15);
1571 } else if (tp->chip_id != PNIC2)
1572 outw(0x0008, ioaddr + CSR15);
1573 if (tp->chip_id == DC21041) /* Trigger NWAY. */
1574 outl(0xEF01, ioaddr + CSR12);
1575 else
1576 outl(0x1301, ioaddr + CSR12);
1577 }
1578
init_media(struct nic * nic)1579 static void init_media(struct nic *nic)
1580 {
1581 int i;
1582
1583 #ifdef TULIP_DEBUG_WHERE
1584 whereami("init_media\n");
1585 #endif
1586
1587 tp->saved_if_port = tp->if_port;
1588 if (tp->if_port == 0)
1589 tp->if_port = tp->default_port;
1590
1591 /* Allow selecting a default media. */
1592 i = 0;
1593 if (tp->mtable == NULL)
1594 goto media_picked;
1595 if (tp->if_port) {
1596 int looking_for = media_cap[tp->if_port] & MediaIsMII ? 11 :
1597 (tp->if_port == 12 ? 0 : tp->if_port);
1598 for (i = 0; i < tp->mtable->leafcount; i++)
1599 if (tp->mtable->mleaf[i].media == looking_for) {
1600 printf("%s: Using user-specified media %s.\n",
1601 tp->nic_name, medianame[tp->if_port]);
1602 goto media_picked;
1603 }
1604 }
1605 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
1606 int looking_for = tp->mtable->defaultmedia & 15;
1607 for (i = 0; i < tp->mtable->leafcount; i++)
1608 if (tp->mtable->mleaf[i].media == looking_for) {
1609 printf("%s: Using EEPROM-set media %s.\n",
1610 tp->nic_name, medianame[looking_for]);
1611 goto media_picked;
1612 }
1613 }
1614 /* Start sensing first non-full-duplex media. */
1615 for (i = tp->mtable->leafcount - 1;
1616 (media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
1617 ;
1618 media_picked:
1619
1620 tp->csr6 = 0;
1621 tp->cur_index = i;
1622 tp->nwayset = 0;
1623
1624 if (tp->if_port) {
1625 if (tp->chip_id == DC21143 && media_cap[tp->if_port] & MediaIsMII) {
1626 /* We must reset the media CSRs when we force-select MII mode. */
1627 outl(0x0000, ioaddr + CSR13);
1628 outl(0x0000, ioaddr + CSR14);
1629 outl(0x0008, ioaddr + CSR15);
1630 }
1631 select_media(nic, 1);
1632 return;
1633 }
1634 switch(tp->chip_id) {
1635 case DC21041:
1636 /* tp->nway = 1;*/
1637 nway_start(nic);
1638 break;
1639 case DC21142:
1640 if (tp->mii_cnt) {
1641 select_media(nic, 1);
1642 #ifdef TULIP_DEBUG
1643 if (tulip_debug > 1)
1644 printf("%s: Using MII transceiver %d, status %hX.\n",
1645 tp->nic_name, tp->phys[0], mdio_read(nic, tp->phys[0], 1));
1646 #endif
1647 outl(0x82020000, ioaddr + CSR6);
1648 tp->csr6 = 0x820E0000;
1649 tp->if_port = 11;
1650 outl(0x0000, ioaddr + CSR13);
1651 outl(0x0000, ioaddr + CSR14);
1652 } else
1653 nway_start(nic);
1654 break;
1655 case PNIC2:
1656 nway_start(nic);
1657 break;
1658 case LC82C168:
1659 if (tp->mii_cnt) {
1660 tp->if_port = 11;
1661 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
1662 outl(0x0001, ioaddr + CSR15);
1663 } else if (inl(ioaddr + CSR5) & TPLnkPass)
1664 pnic_do_nway(nic);
1665 else {
1666 /* Start with 10mbps to do autonegotiation. */
1667 outl(0x32, ioaddr + CSR12);
1668 tp->csr6 = 0x00420000;
1669 outl(0x0001B078, ioaddr + 0xB8);
1670 outl(0x0201B078, ioaddr + 0xB8);
1671 }
1672 break;
1673 case MX98713: case COMPEX9881:
1674 tp->if_port = 0;
1675 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
1676 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
1677 break;
1678 case MX98715: case MX98725:
1679 /* Provided by BOLO, Macronix - 12/10/1998. */
1680 tp->if_port = 0;
1681 tp->csr6 = 0x01a80200;
1682 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
1683 outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
1684 break;
1685 case COMET:
1686 tp->if_port = 0;
1687 tp->csr6 = 0x00040000;
1688 break;
1689 case AX88140: case AX88141:
1690 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
1691 break;
1692 default:
1693 select_media(nic, 1);
1694 }
1695 }
1696
pnic_do_nway(struct nic * nic __unused)1697 static void pnic_do_nway(struct nic *nic __unused)
1698 {
1699 u32 phy_reg = inl(ioaddr + 0xB8);
1700 u32 new_csr6 = tp->csr6 & ~0x40C40200;
1701
1702 #ifdef TULIP_DEBUG_WHERE
1703 whereami("pnic_do_nway\n");
1704 #endif
1705
1706 if (phy_reg & 0x78000000) { /* Ignore baseT4 */
1707 if (phy_reg & 0x20000000) tp->if_port = 5;
1708 else if (phy_reg & 0x40000000) tp->if_port = 3;
1709 else if (phy_reg & 0x10000000) tp->if_port = 4;
1710 else if (phy_reg & 0x08000000) tp->if_port = 0;
1711 tp->nwayset = 1;
1712 new_csr6 = (tp->if_port & 1) ? 0x01860000 : 0x00420000;
1713 outl(0x32 | (tp->if_port & 1), ioaddr + CSR12);
1714 if (tp->if_port & 1)
1715 outl(0x1F868, ioaddr + 0xB8);
1716 if (phy_reg & 0x30000000) {
1717 tp->full_duplex = 1;
1718 new_csr6 |= 0x00000200;
1719 }
1720 #ifdef TULIP_DEBUG
1721 if (tulip_debug > 1)
1722 printf("%s: PNIC autonegotiated status %X, %s.\n",
1723 tp->nic_name, phy_reg, medianame[tp->if_port]);
1724 #endif
1725 if (tp->csr6 != new_csr6) {
1726 tp->csr6 = new_csr6;
1727 outl(tp->csr6 | 0x0002, ioaddr + CSR6); /* Restart Tx */
1728 outl(tp->csr6 | 0x2002, ioaddr + CSR6);
1729 }
1730 }
1731 }
1732
1733 /* Set up the transceiver control registers for the selected media type. */
select_media(struct nic * nic,int startup)1734 static void select_media(struct nic *nic, int startup)
1735 {
1736 struct mediatable *mtable = tp->mtable;
1737 u32 new_csr6;
1738 int i;
1739
1740 #ifdef TULIP_DEBUG_WHERE
1741 whereami("select_media\n");
1742 #endif
1743
1744 if (mtable) {
1745 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
1746 unsigned char *p = mleaf->leafdata;
1747 switch (mleaf->type) {
1748 case 0: /* 21140 non-MII xcvr. */
1749 #ifdef TULIP_DEBUG
1750 if (tulip_debug > 1)
1751 printf("%s: Using a 21140 non-MII transceiver"
1752 " with control setting %hhX.\n",
1753 tp->nic_name, p[1]);
1754 #endif
1755 tp->if_port = p[0];
1756 if (startup)
1757 outl(mtable->csr12dir | 0x100, ioaddr + CSR12);
1758 outl(p[1], ioaddr + CSR12);
1759 new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
1760 break;
1761 case 2: case 4: {
1762 u16 setup[5];
1763 u32 csr13val, csr14val, csr15dir, csr15val;
1764 for (i = 0; i < 5; i++)
1765 setup[i] = get_u16(&p[i*2 + 1]);
1766
1767 tp->if_port = p[0] & 15;
1768 if (media_cap[tp->if_port] & MediaAlwaysFD)
1769 tp->full_duplex = 1;
1770
1771 if (startup && mtable->has_reset) {
1772 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
1773 unsigned char *rst = rleaf->leafdata;
1774 #ifdef TULIP_DEBUG
1775 if (tulip_debug > 1)
1776 printf("%s: Resetting the transceiver.\n",
1777 tp->nic_name);
1778 #endif
1779 for (i = 0; i < rst[0]; i++)
1780 outl(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
1781 }
1782 #ifdef TULIP_DEBUG
1783 if (tulip_debug > 1)
1784 printf("%s: 21143 non-MII %s transceiver control "
1785 "%hX/%hX.\n",
1786 tp->nic_name, medianame[tp->if_port], setup[0], setup[1]);
1787 #endif
1788 if (p[0] & 0x40) { /* SIA (CSR13-15) setup values are provided. */
1789 csr13val = setup[0];
1790 csr14val = setup[1];
1791 csr15dir = (setup[3]<<16) | setup[2];
1792 csr15val = (setup[4]<<16) | setup[2];
1793 outl(0, ioaddr + CSR13);
1794 outl(csr14val, ioaddr + CSR14);
1795 outl(csr15dir, ioaddr + CSR15); /* Direction */
1796 outl(csr15val, ioaddr + CSR15); /* Data */
1797 outl(csr13val, ioaddr + CSR13);
1798 } else {
1799 csr13val = 1;
1800 csr14val = 0x0003FF7F;
1801 csr15dir = (setup[0]<<16) | 0x0008;
1802 csr15val = (setup[1]<<16) | 0x0008;
1803 if (tp->if_port <= 4)
1804 csr14val = t21142_csr14[tp->if_port];
1805 if (startup) {
1806 outl(0, ioaddr + CSR13);
1807 outl(csr14val, ioaddr + CSR14);
1808 }
1809 outl(csr15dir, ioaddr + CSR15); /* Direction */
1810 outl(csr15val, ioaddr + CSR15); /* Data */
1811 if (startup) outl(csr13val, ioaddr + CSR13);
1812 }
1813 #ifdef TULIP_DEBUG
1814 if (tulip_debug > 1)
1815 printf("%s: Setting CSR15 to %X/%X.\n",
1816 tp->nic_name, csr15dir, csr15val);
1817 #endif
1818 if (mleaf->type == 4)
1819 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
1820 else
1821 new_csr6 = 0x82420000;
1822 break;
1823 }
1824 case 1: case 3: {
1825 int phy_num = p[0];
1826 int init_length = p[1];
1827 u16 *misc_info;
1828
1829 tp->if_port = 11;
1830 new_csr6 = 0x020E0000;
1831 if (mleaf->type == 3) { /* 21142 */
1832 u16 *init_sequence = (u16*)(p+2);
1833 u16 *reset_sequence = &((u16*)(p+3))[init_length];
1834 int reset_length = p[2 + init_length*2];
1835 misc_info = reset_sequence + reset_length;
1836 if (startup)
1837 for (i = 0; i < reset_length; i++)
1838 outl(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
1839 for (i = 0; i < init_length; i++)
1840 outl(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
1841 } else {
1842 u8 *init_sequence = p + 2;
1843 u8 *reset_sequence = p + 3 + init_length;
1844 int reset_length = p[2 + init_length];
1845 misc_info = (u16*)(reset_sequence + reset_length);
1846 if (startup) {
1847 outl(mtable->csr12dir | 0x100, ioaddr + CSR12);
1848 for (i = 0; i < reset_length; i++)
1849 outl(reset_sequence[i], ioaddr + CSR12);
1850 }
1851 for (i = 0; i < init_length; i++)
1852 outl(init_sequence[i], ioaddr + CSR12);
1853 }
1854 tp->advertising[phy_num] = get_u16(&misc_info[1]) | 1;
1855 if (startup < 2) {
1856 if (tp->mii_advertise == 0)
1857 tp->mii_advertise = tp->advertising[phy_num];
1858 #ifdef TULIP_DEBUG
1859 if (tulip_debug > 1)
1860 printf("%s: Advertising %hX on MII %d.\n",
1861 tp->nic_name, tp->mii_advertise, tp->phys[phy_num]);
1862 #endif
1863 mdio_write(nic, tp->phys[phy_num], 4, tp->mii_advertise);
1864 }
1865 break;
1866 }
1867 default:
1868 printf("%s: Invalid media table selection %d.\n",
1869 tp->nic_name, mleaf->type);
1870 new_csr6 = 0x020E0000;
1871 }
1872 #ifdef TULIP_DEBUG
1873 if (tulip_debug > 1)
1874 printf("%s: Using media type %s, CSR12 is %hhX.\n",
1875 tp->nic_name, medianame[tp->if_port],
1876 inl(ioaddr + CSR12) & 0xff);
1877 #endif
1878 } else if (tp->chip_id == DC21041) {
1879 int port = tp->if_port <= 4 ? tp->if_port : 0;
1880 #ifdef TULIP_DEBUG
1881 if (tulip_debug > 1)
1882 printf("%s: 21041 using media %s, CSR12 is %hX.\n",
1883 tp->nic_name, medianame[port == 3 ? 12: port],
1884 inl(ioaddr + CSR12));
1885 #endif
1886 outl(0x00000000, ioaddr + CSR13); /* Reset the serial interface */
1887 outl(t21041_csr14[port], ioaddr + CSR14);
1888 outl(t21041_csr15[port], ioaddr + CSR15);
1889 outl(t21041_csr13[port], ioaddr + CSR13);
1890 new_csr6 = 0x80020000;
1891 } else if (tp->chip_id == LC82C168) {
1892 if (startup && ! tp->medialock)
1893 tp->if_port = tp->mii_cnt ? 11 : 0;
1894 #ifdef TULIP_DEBUG
1895 if (tulip_debug > 1)
1896 printf("%s: PNIC PHY status is %hX, media %s.\n",
1897 tp->nic_name, inl(ioaddr + 0xB8), medianame[tp->if_port]);
1898 #endif
1899 if (tp->mii_cnt) {
1900 new_csr6 = 0x810C0000;
1901 outl(0x0001, ioaddr + CSR15);
1902 outl(0x0201B07A, ioaddr + 0xB8);
1903 } else if (startup) {
1904 /* Start with 10mbps to do autonegotiation. */
1905 outl(0x32, ioaddr + CSR12);
1906 new_csr6 = 0x00420000;
1907 outl(0x0001B078, ioaddr + 0xB8);
1908 outl(0x0201B078, ioaddr + 0xB8);
1909 } else if (tp->if_port == 3 || tp->if_port == 5) {
1910 outl(0x33, ioaddr + CSR12);
1911 new_csr6 = 0x01860000;
1912 /* Trigger autonegotiation. */
1913 outl(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
1914 } else {
1915 outl(0x32, ioaddr + CSR12);
1916 new_csr6 = 0x00420000;
1917 outl(0x1F078, ioaddr + 0xB8);
1918 }
1919 } else if (tp->chip_id == DC21040) { /* 21040 */
1920 /* Turn on the xcvr interface. */
1921 #ifdef TULIP_DEBUG
1922 int csr12 = inl(ioaddr + CSR12);
1923 if (tulip_debug > 1)
1924 printf("%s: 21040 media type is %s, CSR12 is %hhX.\n",
1925 tp->nic_name, medianame[tp->if_port], csr12);
1926 #endif
1927 if (media_cap[tp->if_port] & MediaAlwaysFD)
1928 tp->full_duplex = 1;
1929 new_csr6 = 0x20000;
1930 /* Set the full duplux match frame. */
1931 outl(FULL_DUPLEX_MAGIC, ioaddr + CSR11);
1932 outl(0x00000000, ioaddr + CSR13); /* Reset the serial interface */
1933 if (t21040_csr13[tp->if_port] & 8) {
1934 outl(0x0705, ioaddr + CSR14);
1935 outl(0x0006, ioaddr + CSR15);
1936 } else {
1937 outl(0xffff, ioaddr + CSR14);
1938 outl(0x0000, ioaddr + CSR15);
1939 }
1940 outl(0x8f01 | t21040_csr13[tp->if_port], ioaddr + CSR13);
1941 } else { /* Unknown chip type with no media table. */
1942 if (tp->default_port == 0)
1943 tp->if_port = tp->mii_cnt ? 11 : 3;
1944 if (media_cap[tp->if_port] & MediaIsMII) {
1945 new_csr6 = 0x020E0000;
1946 } else if (media_cap[tp->if_port] & MediaIsFx) {
1947 new_csr6 = 0x028600000;
1948 } else
1949 new_csr6 = 0x038600000;
1950 #ifdef TULIP_DEBUG
1951 if (tulip_debug > 1)
1952 printf("%s: No media description table, assuming "
1953 "%s transceiver, CSR12 %hhX.\n",
1954 tp->nic_name, medianame[tp->if_port],
1955 inl(ioaddr + CSR12));
1956 #endif
1957 }
1958
1959 tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
1960 return;
1961 }
1962
1963 /*
1964 Check the MII negotiated duplex and change the CSR6 setting if
1965 required.
1966 Return 0 if everything is OK.
1967 Return < 0 if the transceiver is missing or has no link beat.
1968 */
tulip_check_duplex(struct nic * nic)1969 static int tulip_check_duplex(struct nic *nic)
1970 {
1971 unsigned int bmsr, lpa, negotiated, new_csr6;
1972
1973 bmsr = mdio_read(nic, tp->phys[0], 1);
1974 lpa = mdio_read(nic, tp->phys[0], 5);
1975
1976 #ifdef TULIP_DEBUG
1977 if (tulip_debug > 1)
1978 printf("%s: MII status %#x, Link partner report "
1979 "%#x.\n", tp->nic_name, bmsr, lpa);
1980 #endif
1981
1982 if (bmsr == 0xffff)
1983 return -2;
1984 if ((bmsr & 4) == 0) {
1985 int new_bmsr = mdio_read(nic, tp->phys[0], 1);
1986 if ((new_bmsr & 4) == 0) {
1987 #ifdef TULIP_DEBUG
1988 if (tulip_debug > 1)
1989 printf("%s: No link beat on the MII interface,"
1990 " status %#x.\n", tp->nic_name,
1991 new_bmsr);
1992 #endif
1993 return -1;
1994 }
1995 }
1996 tp->full_duplex = lpa & 0x140;
1997
1998 new_csr6 = tp->csr6;
1999 negotiated = lpa & tp->advertising[0];
2000
2001 if(negotiated & 0x380) new_csr6 &= ~0x400000;
2002 else new_csr6 |= 0x400000;
2003 if (tp->full_duplex) new_csr6 |= 0x200;
2004 else new_csr6 &= ~0x200;
2005
2006 if (new_csr6 != tp->csr6) {
2007 tp->csr6 = new_csr6;
2008
2009 #ifdef TULIP_DEBUG
2010 if (tulip_debug > 0)
2011 printf("%s: Setting %s-duplex based on MII"
2012 "#%d link partner capability of %#x.\n",
2013 tp->nic_name,
2014 tp->full_duplex ? "full" : "half",
2015 tp->phys[0], lpa);
2016 #endif
2017 return 1;
2018 }
2019
2020 return 0;
2021 }
2022
2023 static struct pci_id tulip_nics[] = {
2024 PCI_ROM(0x1011, 0x0002, "dc21040", "Digital Tulip"),
2025 PCI_ROM(0x1011, 0x0009, "ds21140", "Digital Tulip Fast"),
2026 PCI_ROM(0x1011, 0x0014, "dc21041", "Digital Tulip+"),
2027 PCI_ROM(0x1011, 0x0019, "ds21142", "Digital Tulip 21142"),
2028 PCI_ROM(0x10b7, 0x9300, "3csoho100b-tx","3ComSOHO100B-TX"),
2029 PCI_ROM(0x10b9, 0x5261, "ali1563", "ALi 1563 integrated ethernet"),
2030 PCI_ROM(0x10d9, 0x0512, "mx98713", "Macronix MX987x3"),
2031 PCI_ROM(0x10d9, 0x0531, "mx98715", "Macronix MX987x5"),
2032 PCI_ROM(0x1113, 0x1217, "mxic-98715", "Macronix MX987x5"),
2033 PCI_ROM(0x11ad, 0xc115, "lc82c115", "LinkSys LNE100TX"),
2034 PCI_ROM(0x11ad, 0x0002, "82c168", "Netgear FA310TX"),
2035 PCI_ROM(0x1282, 0x9100, "dm9100", "Davicom 9100"),
2036 PCI_ROM(0x1282, 0x9102, "dm9102", "Davicom 9102"),
2037 PCI_ROM(0x1282, 0x9009, "dm9009", "Davicom 9009"),
2038 PCI_ROM(0x1282, 0x9132, "dm9132", "Davicom 9132"),
2039 PCI_ROM(0x1317, 0x0985, "centaur-p", "ADMtek Centaur-P"),
2040 PCI_ROM(0x1317, 0x0981, "an981", "ADMtek AN981 Comet"), /* ADMTek Centaur-P (stmicro) */
2041 PCI_ROM(0x1113, 0x1216, "an983", "ADMTek AN983 Comet"),
2042 PCI_ROM(0x1317, 0x9511, "an983b", "ADMTek Comet 983b"),
2043 PCI_ROM(0x1317, 0x1985, "centaur-c", "ADMTek Centaur-C"),
2044 PCI_ROM(0x8086, 0x0039, "intel21145", "Intel Tulip"),
2045 PCI_ROM(0x125b, 0x1400, "ax88140", "ASIX AX88140"),
2046 PCI_ROM(0x11f6, 0x9881, "rl100tx", "Compex RL100-TX"),
2047 PCI_ROM(0x115d, 0x0003, "xircomtulip", "Xircom Tulip"),
2048 PCI_ROM(0x104a, 0x0981, "tulip-0981", "Tulip 0x104a 0x0981"),
2049 PCI_ROM(0x104a, 0x2774, "tulip-2774", "Tulip 0x104a 0x2774"),
2050 PCI_ROM(0x1113, 0x9511, "tulip-9511", "Tulip 0x1113 0x9511"),
2051 PCI_ROM(0x1186, 0x1561, "tulip-1561", "Tulip 0x1186 0x1561"),
2052 PCI_ROM(0x1259, 0xa120, "tulip-a120", "Tulip 0x1259 0xa120"),
2053 PCI_ROM(0x13d1, 0xab02, "tulip-ab02", "Tulip 0x13d1 0xab02"),
2054 PCI_ROM(0x13d1, 0xab03, "tulip-ab03", "Tulip 0x13d1 0xab03"),
2055 PCI_ROM(0x13d1, 0xab08, "tulip-ab08", "Tulip 0x13d1 0xab08"),
2056 PCI_ROM(0x14f1, 0x1803, "lanfinity", "Conexant LANfinity"),
2057 PCI_ROM(0x1626, 0x8410, "tulip-8410", "Tulip 0x1626 0x8410"),
2058 PCI_ROM(0x1737, 0xab08, "tulip-1737-ab08","Tulip 0x1737 0xab08"),
2059 PCI_ROM(0x1737, 0xab09, "tulip-ab09", "Tulip 0x1737 0xab09"),
2060 };
2061
2062 struct pci_driver tulip_driver = {
2063 .type = NIC_DRIVER,
2064 .name = "Tulip",
2065 .probe = tulip_probe,
2066 .ids = tulip_nics,
2067 .id_count = sizeof(tulip_nics)/sizeof(tulip_nics[0]),
2068 .class = 0,
2069 };
2070