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Searched refs:MMIO_BASE (Results 1 – 1 of 1) sorted by relevance

/titanic_41/usr/src/uts/intel/io/agpmaster/
H A Dagpmaster.c66 #define MMIO_BASE(x) (x)->agpm_data.agpm_gtt.gtt_mmio_base macro
75 ddi_put32(MMIO_HANDLE(x), (uint32_t *)(MMIO_BASE(x) + (off)), (val));
78 ddi_get32(MMIO_HANDLE(x), (uint32_t *)(MMIO_BASE(x) + (off)));
275 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access, in set_gtt_mmio()
284 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access, in set_gtt_mmio()
290 MMIO_BASE(agpmaster) + GM45_GTT_OFFSET; in set_gtt_mmio()
293 MMIO_BASE(agpmaster) + I965_GTT_OFFSET; in set_gtt_mmio()
306 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access, in set_gtt_mmio()
316 &MMIO_BASE(agpmaster), 0, 0, &i8xx_dev_access, in set_gtt_mmio()
320 GTT_ADDR(agpmaster) = MMIO_BASE(agpmaster) + I8XX_PTE_OFFSET; in set_gtt_mmio()
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