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Searched refs:MISC_REG_LCPLL_E40_RESETB_DIG (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c9427 REG_WR(cb, MISC_REG_LCPLL_E40_RESETB_DIG, 0); in elink_warpcore_hw_reset()
14743 REG_WR(cb, MISC_REG_LCPLL_E40_RESETB_DIG, 1); in elink_warpcore_common_init()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h6352 #define MISC_REG_LCPLL_E40_RESETB_DIG macro