Searched refs:MISC_REG_CPMU_LP_MASK_ENT_P0 (Results 1 – 2 of 2) sorted by relevance
7377 REG_WR(cb, MISC_REG_CPMU_LP_MASK_ENT_P0 + (params->port << 2), in elink_update_link_down()7431 REG_WR(cb, MISC_REG_CPMU_LP_MASK_ENT_P0 + in elink_update_link_up()
6120 #define MISC_REG_CPMU_LP_MASK_ENT_P0 … macro