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Searched refs:MISC_REGISTERS_RESET_REG_1_RST_RBCP (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dmisc_bits.h32 #define MISC_REGISTERS_RESET_REG_1_RST_RBCP (0x1<<28) macro
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_hw_init_reset.c628 if(0 == (val & MISC_REGISTERS_RESET_REG_1_RST_RBCP)) in rbc_reset_workaround()
632 … REG_WR(pdev,(GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET),MISC_REGISTERS_RESET_REG_1_RST_RBCP); in rbc_reset_workaround()
639 DbgBreakIf(0 == (val & MISC_REGISTERS_RESET_REG_1_RST_RBCP)); in rbc_reset_workaround()