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Searched refs:MII_CONTROL_RESET (Results 1 – 11 of 11) sorted by relevance

/titanic_41/usr/src/uts/common/io/atge/
H A Datge_mii.c198 atge_mii_write(atgep, phyaddr, MII_CONTROL, MII_CONTROL_RESET); in atge_l1_mii_reset()
224 MII_CONTROL_RESET | MII_CONTROL_ANE | MII_CONTROL_RSAN); in atge_l1_mii_reset()
376 if ((val & MII_CONTROL_RESET) == 0) { in atge_l1c_mii_write()
378 atge_mii_write(arg, phy, reg, val | MII_CONTROL_RESET); in atge_l1c_mii_write()
/titanic_41/usr/src/uts/common/sys/
H A Dmiiregs.h53 #define MII_CONTROL_RESET (1<<15) macro
/titanic_41/usr/src/uts/intel/io/dnet/
H A Ddnet_mii.c302 phyd->control | MII_CONTROL_RESET); in mii_reset_phy()
314 if (!(control & MII_CONTROL_RESET)) in mii_reset_phy()
325 if (!(control & MII_CONTROL_RESET)) in mii_reset_phy()
/titanic_41/usr/src/uts/common/io/nge/
H A Dnge_xmii.c243 control |= MII_CONTROL_RESET; in nge_phy_reset()
250 if (BIC(control, MII_CONTROL_RESET)) in nge_phy_reset()
/titanic_41/usr/src/uts/common/io/mii/
H A Dmii_marvell.c194 reg |= MII_CONTROL_RESET; in mvphy_loop_88e3016()
H A Dmii.c1092 PHY_SET(ph, MII_CONTROL, MII_CONTROL_RESET); in phy_reset()
1111 if ((phy_read(ph, MII_CONTROL) & MII_CONTROL_RESET) == 0) { in phy_reset()
/titanic_41/usr/src/uts/common/io/bge/
H A Dbge_mii.c252 bge_mii_put16(bgep, MII_CONTROL, MII_CONTROL_RESET); in bge_phy_reset()
256 if (BIC(control, MII_CONTROL_RESET)) in bge_phy_reset()
/titanic_41/usr/src/uts/common/io/rge/
H A Drge_chip.c361 rge_mii_put16(rgep, MII_CONTROL, control | MII_CONTROL_RESET); in rge_phy_reset()
365 if (BIC(control, MII_CONTROL_RESET)) in rge_phy_reset()
/titanic_41/usr/src/uts/common/io/bfe/
H A Dbfe.c376 bfe_write_phy(bfe, MII_CONTROL, MII_CONTROL_RESET); in bfe_reset_phy()
380 MII_CONTROL_RESET) { in bfe_reset_phy()
/titanic_41/usr/src/uts/common/io/mxfe/
H A Dmxfe.c1314 mxfe_miiwrite(mxfep, phyaddr, MII_CONTROL, MII_CONTROL_RESET); in mxfe_startphymii()
1322 MII_CONTROL_RESET) { in mxfe_startphymii()
/titanic_41/usr/src/uts/common/io/sfe/
H A Dsfe_util.c2297 if (val & MII_CONTROL_RESET) { in gem_mii_link_check()
2787 gem_mii_write(dp, MII_CONTROL, MII_CONTROL_RESET); in gem_mii_link_check()
2801 ~(MII_CONTROL_ISOLATE | MII_CONTROL_PWRDN | MII_CONTROL_RESET); in gem_mii_link_check()