Searched refs:MII_CONTROL_100MB (Results 1 – 10 of 10) sorted by relevance
55 #define MII_CONTROL_100MB (1<<13) macro
498 *speed = phyd->control & MII_CONTROL_100MB ? 100:10; in mii_getspeed()529 phyd->control |= MII_CONTROL_100MB; in mii_fixspeed()531 phyd->control &= ~MII_CONTROL_100MB; in mii_fixspeed()
430 control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX; in nge_update_copper()432 control |= MII_CONTROL_100MB; in nge_update_copper()
1166 bmcr |= MII_CONTROL_100MB | MII_CONTROL_FDUPLEX; in phy_loop()1181 bmcr = MII_CONTROL_100MB | MII_CONTROL_FDUPLEX; in phy_loop()1284 bmcr |= MII_CONTROL_100MB; in phy_start()1446 } else if (control & MII_CONTROL_100MB) { in phy_check()
777 (MII_CONTROL_100MB | MII_CONTROL_FDUPLEX); in vr_param_init()2685 vrp->chip.mii.control |= MII_CONTROL_100MB; in vr_link_init()2689 vrp->chip.mii.control |= MII_CONTROL_100MB; in vr_link_init()2694 vrp->chip.mii.control &= ~MII_CONTROL_100MB; in vr_link_init()2696 vrp->chip.mii.control &= ~MII_CONTROL_100MB; in vr_link_init()2787 if ((vrp->chip.mii.control & MII_CONTROL_100MB) != 0) { in vr_link_state()
1043 control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX; in bge_update_copper()1045 control |= MII_CONTROL_100MB; in bge_update_copper()
685 bmcr = (MII_CONTROL_100MB | MII_CONTROL_FDUPLEX); in bfe_startup_phy()687 bmcr = MII_CONTROL_100MB; in bfe_startup_phy()770 if (bmcr & MII_CONTROL_100MB) in bfe_check_link()
1410 bmcr = (MII_CONTROL_100MB | MII_CONTROL_FDUPLEX); in mxfe_startphymii()1412 bmcr = MII_CONTROL_100MB; in mxfe_startphymii()1520 if (bmcr & MII_CONTROL_100MB) { in mxfe_checklinkmii()
514 control |= MII_CONTROL_100MB|MII_CONTROL_FDUPLEX; in rge_phy_update()516 control |= MII_CONTROL_100MB; in rge_phy_update()
2548 dp->speed = (val & MII_CONTROL_100MB) ? in gem_mii_link_check()2605 val |= MII_CONTROL_100MB; in gem_mii_link_check()