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Searched refs:MEMWIN2_BASE (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.h50 MEMWIN2_BASE = 0x30000, enumerator
/titanic_41/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_ioctl.c555 *b++ = t4_read_reg(sc, MEMWIN2_BASE + off + i); in read_card_mem()
H A Dt4_nexus.c1175 t4_write_reg(sc, MEMWIN2_BASE + off + i, *b++); in upload_config_file()
1395 (bar0 + MEMWIN2_BASE) | V_BIR(0) | in setup_memwin()