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Searched refs:MDIO_WC_REG_XGXS_X2_CONTROL2 (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h574 #define MDIO_WC_REG_XGXS_X2_CONTROL2 0x8141 macro
/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c5008 MDIO_WC_REG_XGXS_X2_CONTROL2, 0x29FB); in elink_warpcore_powerdown_secondport_lanes()
14795 MDIO_WC_REG_XGXS_X2_CONTROL2, &val); in elink_warpcore_common_init()
14813 MDIO_WC_REG_XGXS_X2_CONTROL2, val); in elink_warpcore_common_init()