Searched refs:MDIO_WC_REG_PMD_KR_CONTROL (Results 1 – 2 of 2) sorted by relevance
538 #define MDIO_WC_REG_PMD_KR_CONTROL 0x0096 macro
4042 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2}, in elink_warpcore_enable_AN_KR()4197 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2} in elink_warpcore_set_10G_KR()4381 MDIO_WC_REG_PMD_KR_CONTROL, ~(1<<1)); in elink_warpcore_set_20G_force_KR2()