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Searched refs:MDIO_WC_REG_FX100_CTRL1 (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h651 #define MDIO_WC_REG_FX100_CTRL1 0x8400 macro
/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4270 MDIO_WC_REG_FX100_CTRL1, 0xFFFA); in elink_warpcore_set_10G_XFI()
4588 {MDIO_WC_DEVAD, MDIO_WC_REG_FX100_CTRL1, 0x014a}, in elink_warpcore_clear_regs()