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Searched refs:MDIO_PMA_DEVAD (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4037 {MDIO_PMA_DEVAD, MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0x0}, in elink_warpcore_enable_AN_KR()
4042 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2}, in elink_warpcore_enable_AN_KR()
4197 {MDIO_PMA_DEVAD, MDIO_WC_REG_PMD_KR_CONTROL, 0x2} in elink_warpcore_set_10G_KR()
4223 elink_cl45_write(cb, phy, MDIO_PMA_DEVAD, in elink_warpcore_set_10G_KR()
4226 elink_cl45_write(cb, phy, MDIO_PMA_DEVAD, in elink_warpcore_set_10G_KR()
4380 elink_cl45_read_and_write(cb, phy, MDIO_PMA_DEVAD, in elink_warpcore_set_20G_force_KR2()
6682 MDIO_PMA_DEVAD, in elink_wait_reset_complete()
7807 elink_cl45_read(cb, phy, MDIO_PMA_DEVAD, in elink_save_bcm_spirom_ver()
7809 elink_cl45_read(cb, phy, MDIO_PMA_DEVAD, in elink_save_bcm_spirom_ver()
7887 MDIO_PMA_DEVAD, in elink_8073_8727_external_rom_boot()
[all …]
/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h297 #define MDIO_PMA_DEVAD 0x1 macro