Searched refs:MDIO_AER_BLOCK_AER_REG (Results 1 – 3 of 3) sorted by relevance
/titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
H A D | phy_reg.h | 231 #define MDIO_AER_BLOCK_AER_REG 0x1E macro
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H A D | clc_reg.h | 258 #define MDIO_AER_BLOCK_AER_REG 0x1E macro
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/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/ |
H A D | bnxe_clc.c | 3597 MDIO_AER_BLOCK_AER_REG, aer_val); in elink_set_aer_mmd() 4021 MDIO_AER_BLOCK_AER_REG, lane); in elink_warpcore_restart_AN_KR() 4076 MDIO_AER_BLOCK_AER_REG, 0); in elink_warpcore_enable_AN_KR() 4137 MDIO_AER_BLOCK_AER_REG, lane); in elink_warpcore_enable_AN_KR() 4207 MDIO_AER_BLOCK_AER_REG, 0); in elink_warpcore_set_10G_KR() 4372 MDIO_AER_BLOCK_AER_REG, 0); in elink_warpcore_set_20G_force_KR2() 4410 MDIO_AER_BLOCK_AER_REG, 0); in elink_warpcore_set_20G_force_KR2() 4916 MDIO_AER_BLOCK_AER_REG, 0); in elink_warpcore_link_reset() 4967 MDIO_AER_BLOCK_AER_REG, 0); in elink_set_warpcore_loopback() 5175 MDIO_AER_BLOCK_AER_REG, lane); in elink_warpcore_set_quad_mode() [all …]
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