Searched refs:MCREG_FIELD_F_revFG (Results 1 – 4 of 4) sorted by relevance
| /titanic_41/usr/src/uts/intel/io/mc-amd/ |
| H A D | mcamd_drv.c | 217 MCREG_FIELD_F_revFG(&nbcfg, EccEn)); in mc_ecc_enabled()
230 MCREG_FIELD_F_revFG(&nbcfg, ChipKillEccEn)); in mc_ck_enabled()
558 r4 = MCREG_FIELD_F_revFG(drcfghip, FourRankRDimm); in mc_dimmlist_create()
566 s4 = MCREG_FIELD_F_revFG(drcfghip, FourRankSODimm); in mc_dimmlist_create()
741 if (MCREG_FIELD_F_revFG(&sparectl, SwapDone)) { in mc_getmiscctl()
743 MCREG_FIELD_F_revFG(&sparectl, BadDramCs); in mc_getmiscctl()
812 wide = MCREG_FIELD_F_revFG(&drcfg_lo, Width128); in mc_mkprops_dramctl()
826 mcp->mcp_mod64mux = MCREG_FIELD_F_revFG(&drmisc, Mod64Mux); in mc_mkprops_dramctl()
849 mcp->mcp_bnkswzl = MCREG_FIELD_F_revFG(&drcfg_hi, in mc_mkprops_dramctl()
877 csbe = MCREG_FIELD_F_revFG(&base[i], CSEnable); in mc_mkprops_dramctl()
[all …]
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| /titanic_41/usr/src/uts/i86pc/cpu/authenticamd/ |
| H A D | authamd_main.c | 313 MCREG_FIELD_F_revFG(&sparectl, EccErrCntWrEn) = 0; in authamd_read_ecccnt()
324 MCREG_FIELD_F_revFG(&sparectl, EccErrCntDramChan) = in authamd_read_ecccnt()
337 MCREG_FIELD_F_revFG(&sparectl, in authamd_read_ecccnt()
356 MCREG_FIELD_F_revFG(&sparectl, EccErrCnt); in authamd_read_ecccnt()
397 MCREG_FIELD_F_revFG(&sparectl, EccErrCntWrEn) = 1; in authamd_clear_ecccnt()
399 MCREG_FIELD_F_revFG(&sparectl, EccErrInt) = 0; in authamd_clear_ecccnt()
400 MCREG_FIELD_F_revFG(&sparectl, SwapDoneInt) = 0; in authamd_clear_ecccnt()
419 MCREG_FIELD_F_revFG(&sparectl, EccErrCntDramChan) = in authamd_clear_ecccnt()
432 MCREG_FIELD_F_revFG(&sparectl, in authamd_clear_ecccnt()
434 MCREG_FIELD_F_revFG(&sparectl, in authamd_clear_ecccnt()
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| /titanic_41/usr/src/uts/i86pc/cpu/amd_opteron/ |
| H A D | ao_mca.c | 478 MCREG_FIELD_F_revFG(&dcfglo, ParEn)) { in ao_dram_cfg()
479 MCREG_FIELD_F_revFG(&dcfglo, ParEn) = 0; in ao_dram_cfg()
516 MCREG_FIELD_F_revFG(&sparectl, EccErrInt) = 0; in ao_sparectl_cfg()
517 MCREG_FIELD_F_revFG(&sparectl, SwapDoneInt) = 0; in ao_sparectl_cfg()
522 MCREG_FIELD_F_revFG(&sparectl, EccErrCntWrEn) = 1; in ao_sparectl_cfg()
523 MCREG_FIELD_F_revFG(&sparectl, EccErrCnt) = 0; in ao_sparectl_cfg()
525 MCREG_FIELD_F_revFG(&sparectl, EccErrCntDramChan) = chan; in ao_sparectl_cfg()
528 MCREG_FIELD_F_revFG(&sparectl, EccErrCntDramCs) = cs; in ao_sparectl_cfg()
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| /titanic_41/usr/src/uts/intel/sys/ |
| H A D | mc_amd.h | 292 #define MCREG_FIELD_F_revFG(up, field) _MCREG_FIELD(up, f_revFG, field) macro
444 (uint64_t)MCREG_FIELD_F_revFG(up, BaseAddrHi) << 27 | \
445 (uint64_t)MCREG_FIELD_F_revFG(up, BaseAddrLo) << 13 : \
486 (uint64_t)MCREG_FIELD_F_revFG(up, AddrMaskHi) << 27 | \
487 (uint64_t)MCREG_FIELD_F_revFG(up, AddrMaskLo) << 13 | 0x7c01fff : \
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