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Searched refs:MCERR_THR_WR (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/intel_nb5000/
H A Dnb5000_init.c1416 MCERR_THR_WR(0xffff); in nb_thr_init()
1437 MCERR_THR_WR(mcerr_thr); in nb_thr_init()
1449 MCERR_THR_WR(0xffff); in nb_thr_fini()
1455 MCERR_THR_WR(nb_mcerr_thr); in nb_thr_fini()
1467 MCERR_THR_WR(emask_thr|mc_mask_thr); in nb_thr_mask_mc()
1487 MCERR_THR_WR(l_mcerr_thr); in nb_mask_mc_reset()
H A Dnb5000.h1418 #define MCERR_THR_WR(val) nb_pci_putw(0, 16, 2, 0xfe, val) macro