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Searched refs:MC5_IDT_SSR0_ADR0 (Results 1 – 1 of 1) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dmc5.c79 #define MC5_IDT_SSR0_ADR0 0x180002 macro
350 if (mc5_write(adap, MC5_IDT_SSR0_ADR0, MC5_IDT_CMD_WRITE) || in init_idt52100()