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Searched refs:JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/sun4u/io/px/
H A Dpx_hlib.c130 JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE,
228 CSR_XS(xbc_csr_base, JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE, -1ull); in jbc_init()
231 CSR_XR(xbc_csr_base, JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE)); in jbc_init()
H A Dpx_regs.h751 #define JBC_CORE_AND_BLOCK_INTERRUPT_ENABLE 0x471800 macro