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Searched refs:IWP_SCD_BASE (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/iwp/
H A Diwp_hw.h2582 #define IWP_SCD_BASE (PRPH_BASE + 0xA02C00) macro
2584 #define IWP_SCD_SRAM_BASE_ADDR (IWP_SCD_BASE + 0x0)
2585 #define IWP_SCD_DRAM_BASE_ADDR (IWP_SCD_BASE + 0x8)
2586 #define IWP_SCD_QUEUECHAIN_SEL (IWP_SCD_BASE + 0xE8)
2587 #define IWP_SCD_AGGR_SEL (IWP_SCD_BASE + 0x248)
2588 #define IWP_SCD_QUEUE_RDPTR(x) (IWP_SCD_BASE + 0x68 + (x) * 4)
2589 #define IWP_SCD_INTERRUPT_MASK (IWP_SCD_BASE + 0x108)
2590 #define IWP_SCD_TXFACT (IWP_SCD_BASE + 0x1C)
2591 #define IWP_SCD_QUEUE_STATUS_BITS(x) (IWP_SCD_BASE + 0x10C + (x) * 4)
H A Diwp.c4962 iwp_reg_write(sc, (IWP_SCD_BASE + 0x10), in iwp_alive_common()